公开(公告)号：US20240038177A1

公开(公告)日：2024-02-01

申请号：US18226950

申请日：2023-07-27

Applicant: LG DISPLAY CO., LTD.

Inventor： Haksu KIM ,  YoungKyu SHIN ,  SeongWook CHOI

IPC: G09G3/3266 ,  G09G3/3225

CPC classification number: G09G3/3266 ,  G09G3/3225 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2310/08

Abstract: A gate driving circuit includes a first mode controller configured to output a first emission signal based on at least one of a potential of a first node and a potential of a second node to a first output line in response to reception of a first mode signal, a second mode controller configured to output a second emission signal based on at least one of the potential of the first node and the potential of the second node to a second output line in response to reception of the second mode signal, and a node controller configured to control the potential of the first node and the potential of the second node by using at least one of a start signal, a first clock signal and a second clock signal.

公开(公告)号：US20250029556A1

公开(公告)日：2025-01-23

申请号：US18777028

申请日：2024-07-18

Applicant: LG Display Co., Ltd.

Inventor： SeongHo CHO ,  SangMoo SONG ,  YoungKyu SHIN ,  Solip JU

IPC: G09G3/3225

Abstract: A display device can include a plurality of pixel blocks, each of the plurality of pixel blocks including a plurality of pixels, a plurality of mux parts disposed to correspond to columns of the plurality of pixel blocks, a first level shift configured to transmit a first mode signal or a second mode signal to the plurality of mux parts, a second level shift configured to transmit a plurality of mux signals to the plurality of mux parts, and a mode controller configured to control the first level shift and the second level shift.

公开(公告)号：US20240257719A1

公开(公告)日：2024-08-01

申请号：US18429027

申请日：2024-01-31

Applicant: LG Display Co., Ltd.

Inventor： YoungKyu SHIN ,  SeonGeun GIM ,  Solip JU

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2310/0297 ,  G09G2310/08 ,  G09G2320/028 ,  G09G2330/021

Abstract: A display panel and a display apparatus are provided, in which a ratio of a plurality of areas capable of independently controlling a viewing angle in a display area may be adjusted. The display panel includes pixel blocks including subpixels and multiplexer circuits disposed in a bezel area and individually connected to the pixel blocks. The multiplexer circuits supplies first and second mode control signals to any one of the pixel blocks. The subpixels include a first light-emitting element connected to a driving transistor through a first mode control transistor controlled by the first mode control signal, a second light-emitting element connected to the driving transistor through a second mode control transistor controlled by the second mode control signal, a first lens area disposed on the first light-emitting element, and a second lens area disposed on the second light-emitting element.