公开(公告)号：US20170018574A1

公开(公告)日：2017-01-19

申请号：US14953764

申请日：2015-11-30

Applicant: LG Display Co., Ltd.

Inventor： Youngmin JEONG ,  Seunghwan SHIN ,  Daeyoung SEO ,  Soyoung LEE

IPC: H01L27/12

CPC classification number: H01L27/124 ,  G02F1/134363 ,  G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  G02F2201/40 ,  H01L27/1237 ,  H01L27/1259 ,  H01L27/1262 ,  H01L27/1288

Abstract: A display device is described that has reduced resistance in one or more of the gate, common, data electrical lines that control the operation of the pixels of the display device. Reduced resistance is achieved by forming additional metal and/or metal-alloy layers on the gate, common, and/or data lines in such a manner so that the cross-sectional area of those lines is increased. As a consequence, each such line is formed so as to be thicker than could otherwise be achieving without causing defects in the rubbing process of an alignment layer. Additionally, no widening of these lines is needed, thus preserving the aspect ratio of the device. The gate insulating and semiconducting layers that in part make up the thin film transistors that help control the operation of the pixels of the device may also be designed to take into account the increased thickness of the lines.

Abstract translation: 描述了在控制显示装置的像素的操作的一个或多个栅极，公共数据电线中降低电阻的显示装置。 通过在栅极，公共和/或数据线上形成额外的金属和/或金属合金层，使得这些线的横截面面积增加，可实现降低电阻。 结果，每个这样的线形成为比否则可以实现的厚，而不引起对准层的摩擦过程中的缺陷。 另外，不需要扩大这些线，因此保持了装置的纵横比。 部分地构成薄膜晶体管的栅极绝缘层和半导体层有助于控制器件的像素的操作也可以被设计成考虑到线的增加的厚度。

公开(公告)号：US20160018709A1

公开(公告)日：2016-01-21

申请号：US14752422

申请日：2015-06-26

Applicant: LG DISPLAY CO., LTD.

Inventor： Youngmin JEONG ,  Wonho LEE

IPC: G02F1/1362 ,  G02F1/1333 ,  G02F1/1343

CPC classification number: G02F1/136213

Abstract: A pixel array of a liquid crystal display is discussed. The pixel array can include a first pixel including a first pixel electrode charged to a first data voltage, an upper common electrode which is positioned opposite the first pixel electrode and forms an electric field, a lower common electrode applying a common voltage to the upper common electrode, and a first storage capacitor for holding the first data voltage during a predetermined period, and a second pixel including a second pixel electrode charged to a second data voltage, the upper common electrode, the lower common electrode, and a second storage capacitor for holding the second data voltage during a predetermined period. The first and second storage capacitors are located in a storage area between the first and second pixels, which are positioned adjacent to each other in a horizontal direction.

Abstract translation: 讨论了液晶显示器的像素阵列。 像素阵列可以包括第一像素，其包括充电到第一数据电压的第一像素电极，与第一像素电极相对设置并形成电场的上部公共电极，向公共电极施加公共电压的下部公共电极 电极和用于在预定时段内保持第一数据电压的第一存储电容器，以及包括充电到第二数据电压的第二像素电极的第二像素，上公共电极，下公共电极和第二存储电容器 在预定时段期间保持第二数据电压。 第一和第二存储电容器位于第一和第二像素之间的存储区域中，它们在水平方向上彼此相邻地定位。

公开(公告)号：US20180083039A1

公开(公告)日：2018-03-22

申请号：US15801120

申请日：2017-11-01

Applicant: LG Display Co., Ltd.

Inventor： Youngmin JEONG ,  Seunghwan SHIN ,  Daeyoung SEO ,  Soyoung LEE

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: H01L27/124 ,  G02F1/134363 ,  G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  G02F2201/40 ,  H01L27/1237 ,  H01L27/1259 ,  H01L27/1262 ,  H01L27/1288

Abstract: A display device is described that has reduced resistance in one or more of the gate, common, data electrical lines that control the operation of the pixels of the display device. Reduced resistance is achieved by forming additional metal and/or metal-alloy layers on the gate, common, and/or data lines in such a manner so that the cross-sectional area of those lines is increased. As a consequence, each such line is formed so as to be thicker than could otherwise be achieving without causing defects in the rubbing process of an alignment layer. Additionally, no widening of these lines is needed, thus preserving the aspect ratio of the device. The gate insulating and semiconducting layers that in part make up the thin film transistors that help control the operation of the pixels of the device may also be designed to take into account the increased thickness of the lines.

公开(公告)号：US20190139989A1

公开(公告)日：2019-05-09

申请号：US16235639

申请日：2018-12-28

Applicant: LG Display Co., Ltd.

Inventor： Youngmin JEONG ,  Seunghwan SHIN ,  Daeyoung SEO ,  Soyoung LEE

IPC: H01L27/12 ,  G02F1/1362

Abstract: A display device is described that has reduced resistance in one or more of the gate, common, data electrical lines that control the operation of the pixels of the display device. Reduced resistance is achieved by forming additional metal and/or metal-alloy layers on the gate, common, and/or data lines in such a manner so that the cross-sectional area of those lines is increased. As a consequence, each such line is formed so as to be thicker than could otherwise be achieving without causing defects in the rubbing process of an alignment layer. Additionally, no widening of these lines is needed, thus preserving the aspect ratio of the device. The gate insulating and semiconducting layers that in part make up the thin film transistors that help control the operation of the pixels of the device may also be designed to take into account the increased thickness of the lines.