公开(公告)号：US20250021784A1

公开(公告)日：2025-01-16

申请号：US18901921

申请日：2024-09-30

Applicant: LG INNOTEK CO., LTD.

Inventor： Seung Joon KIM ,  Jun Young LIM ,  Yong Hyun CHO

IPC: G06K19/077

Abstract: A smart IC substrate according to an embodiment includes: a substrate including one surface and the other surface; a circuit pattern and a connection circuit pattern disposed on the one surface; and a coil pattern disposed on the other surface, wherein a chip mounting region is formed on the other surface, the coil pattern is electrically connected to a first terminal and a second terminal, the substrate includes a first region disposed inside the coil pattern and a second region disposed outside the coil pattern, the first terminal is disposed in the first region, the second terminal is disposed in the second region, a first via is formed in the first region corresponding to the circuit pattern of the substrate, a second via is formed in the second region of the substrate, a third via is formed in the first region corresponding to the connection circuit pattern of the substrate, and a connection member is disposed inside the second via.

公开(公告)号：US20220076092A1

公开(公告)日：2022-03-10

申请号：US17447020

申请日：2021-09-07

Applicant: LG INNOTEK CO., LTD.

Inventor： Seung Joon KIM ,  Jun Young LIM ,  Yong Hyun CHO

IPC: G06K19/077

Abstract: A smart IC substrate according to an embodiment includes: a substrate including one surface and the other surface; a circuit pattern and a connection circuit pattern disposed on the one surface; and a coil pattern disposed on the other surface, wherein a chip mounting region is formed on the other surface, the coil pattern is electrically connected to a first terminal and a second terminal, the substrate includes a first region disposed inside the coil pattern and a second region disposed outside the coil pattern, the first terminal is disposed in the first region, the second terminal is disposed in the second region, a first via is formed in the first region corresponding to the circuit pattern of the substrate, a second via is formed in the second region of the substrate, a third via is formed in the first region corresponding to the connection circuit pattern of the substrate, and a connection member is disposed inside the second via.

公开(公告)号：US20220078906A1

公开(公告)日：2022-03-10

申请号：US17446541

申请日：2021-08-31

Applicant: LG INNOTEK CO., LTD.

Inventor： Seung Joon KIM ,  Yong Hyun GWON ,  Yong Hyun CHO

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/09 ,  G06K9/00 ,  G06K19/07

Abstract: A circuit board according to an embodiment includes: a substrate including one surface and the other surface; a first circuit pattern disposed on the one surface; and a second circuit pattern disposed on the other surface, wherein at least one via is formed in the substrate, and the first circuit pattern and the second circuit pattern are wire-bonded through the via to conduct electricity.