公开(公告)号：US20230110471A1

公开(公告)日：2023-04-13

申请号：US17820862

申请日：2022-08-18

申请人： LX Semicon Co., Ltd.

发明人： Sung Wan JUNG ,  Seong Bok CHA ,  Soo Woo KIM ,  Yong Ik JUNG

IPC分类号： G09G3/20

摘要： The present disclosure discloses a display apparatus having a lock function and a display driving circuit thereof. The display driving circuit of the present disclosure is configured to transfer a lock signal in a cascade way, receive a lock signal by pull-up and transfer the lock signal in an open drain form.

公开(公告)号：US20240363053A1

公开(公告)日：2024-10-31

申请号：US18768808

申请日：2024-07-10

申请人： LX SEMICON CO., LTD.

发明人： Sung Wan JUNG ,  Seong Bok CHA ,  Soo Woo KIM ,  Yong Ik JUNG

IPC分类号： G09G3/20

CPC分类号： G09G3/2096 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2330/04

摘要： A display driving circuit having a lock function includes a comparison unit configured to receive a transfer lock signal and output a comparison signal obtained by comparing the transfer lock signal and an internal lock signal obtained by determining a state of an internal recovery clock; and an output circuit comprising an internal output pull-up circuit and configured to generate a feedback lock signal having a level corresponding to a level of the comparison signal by using the internal output pull-up circuit and to output the feedback lock signal to a lock signal transmission line to which an external power source is applied.

公开(公告)号：US20230326392A1

公开(公告)日：2023-10-12

申请号：US18210101

申请日：2023-06-15

申请人： LX Semicon Co., Ltd.

发明人： Sung Wan JUNG ,  Seong Bok CHA ,  Soo Woo KIM ,  Yong Ik JUNG

IPC分类号： G09G3/20

CPC分类号： G09G3/2096 ,  G09G2330/04 ,  G09G2330/021 ,  G09G2310/08

摘要： The present disclosure discloses a display apparatus having a lock function and a display driving circuit thereof. The display driving circuit of the present disclosure is configured to transfer a lock signal in a cascade way, receive a lock signal by pull-up and transfer the lock signal in an open drain form.

公开(公告)号：US20220189370A1

公开(公告)日：2022-06-16

申请号：US17545481

申请日：2021-12-08

申请人： LX SEMICON CO., LTD.

发明人： Sung Wan JUNG ,  Sung Je EOM

IPC分类号： G09G3/20

摘要： The present disclosure relates to a data driver circuit capable of overcoming a limitation in frequency by correcting a skew between a clock and data even when a frequency and the number of channels are increased, and the data driver circuit according to an aspect may include a shift register configured output sampling signals in response to a clock, a first latch part configured to sample and latch data of each channel in response to each of the sampling signals, and a bi-directional deskew buffer part disposed between a stage of a first channel and a stage of a second channel belonging to the shift register and between a first latch of a first channel and a second latch of a second channel belonging to the first latch part and configured to buffer a clock input from the stage of the first channel.