公开(公告)号：US09325302B1

公开(公告)日：2016-04-26

申请号：US14558851

申请日：2014-12-03

Applicant: Lattice Semiconductor Corporation

Inventor： Vinh Ho ,  Magathi Jayaram ,  David Wei

IPC: H03K5/00 ,  H03K5/1252 ,  H03H11/04

CPC classification number: H03K5/1252 ,  H03H15/00 ,  H03H17/0294 ,  H03H17/06 ,  H03H2015/007

Abstract: In several embodiments of the invention, a programmable architecture for FIR filters includes a tapped delay chain and a number of different slices. Each slice has a multiplexer that receives all of the tapped input-signal samples and a programmable current driver. Each slice can be independently programmed to correspond to any one of the taps in the delay chain, such that zero, one, or more slices can be associated with any of the delay-chain taps. Moreover, the current driver in each slice can be independently programmed to contribute any available driver strength level for the selected tap, where the combination of one or more drive strengths associated with a given tap corresponds to the effective tap coefficient for that tap. In this way, the architecture can be programmed to provide a variety of different filters having not just transfer functions with different coefficient values, but also transfer functions having different numbers of pre-cursor and/or post-cursor taps.

Abstract translation: 在本发明的若干实施例中，用于FIR滤波器的可编程架构包括抽头延迟链和多个不同切片。 每个切片具有接收所有抽头输入信号样本和可编程电流驱动器的多路复用器。 每个切片可以被独立地编程以对应于延迟链中的任何一个抽头，使得零，一个或多个切片可以与任何延迟链抽头相关联。 此外，每个切片中的当前驱动器可以被独立地编程以为所选择的抽头提供任何可用的驱动器强度级别，其中与给定抽头相关联的一个或多个驱动强度的组合对应于该抽头的有效抽头系数。 以这种方式，可以对该体系结构进行编程，以提供不仅具有不同系数值的传递函数的各种不同的滤波器，而且还具有具有不同数量的前置光标和/或后置光标抽头的传输函数。