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公开(公告)号：US20070129038A1
公开(公告)日：2007-06-07
申请号：US11294663
申请日：2005-12-05
申请人： Lawrence Ragan , Matthew Felder , Jingyu Hu , Jamie Happ , Michael May
发明人： Lawrence Ragan , Matthew Felder , Jingyu Hu , Jamie Happ , Michael May
IPC分类号： H04B17/00
CPC分类号： H04B1/18
摘要： A radio receiver front-end includes a tunable antenna interface and a low noise amplifying section. The tunable antenna interface is operably coupled to receive a wide bandwidth signal from an antenna, wherein the wide bandwidth signal includes a plurality of channel signals, and wherein the tunable antenna interface is tuned to pass a selected one of the plurality of channel signals substantially unattenuated and to attenuate remaining ones of the plurality of channel signals to produce a filtered wide bandwidth signal. The low noise amplifying section is operably coupled to amplify the filtered wide bandwidth signal to produce a filtered and amplified wide bandwidth signal.
摘要翻译： 无线电接收机前端包括可调谐天线接口和低噪声放大部分。 可调谐天线接口可操作地耦合以从天线接收宽带宽信号，其中宽带宽信号包括多个信道信号，并且其中可调谐天线接口被调谐以将多个信道信号中选定的一个信道基本上未衰减 并衰减多个信道信号中剩余的信道信号，以产生滤波的宽带宽信号。 低噪声放大部分可操作地耦合以放大经滤波的宽带宽信号以产生滤波和放大的宽带宽信号。
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公开(公告)号：US20070242780A1
公开(公告)日：2007-10-18
申请号：US11405887
申请日：2006-04-18
申请人： Michael May , Lawrence Ragan
发明人： Michael May , Lawrence Ragan
CPC分类号： H04L27/14 , G11B31/003 , H04B1/0007 , H04B1/1653 , H04B1/28 , H04B1/30
摘要： A handheld audio system having a radio signal decoder that includes a method for adjusting a system clock. Adjusting the system clock includes receiving a signal at a rate of a receive clock, wherein the signal includes data at a transmit rate. An error term is determined between the receive rate and the transmit rate. Based on the receive clock and the error term, where the error term is non-zero, a clock signal is generated.
摘要翻译： 一种具有无线电信号解码器的手持音频系统，其包括用于调整系统时钟的方法。 调整系统时钟包括以接收时钟的速率接收信号，其中信号包括传输速率的数据。 在接收速率和传输速率之间确定误差项。 基于接收时钟和误差项，其中误差项不为零，产生时钟信号。
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公开(公告)号：US20070223631A1
公开(公告)日：2007-09-27
申请号：US11388675
申请日：2006-03-24
申请人： Matthew Felder , Michael May
发明人： Matthew Felder , Michael May
IPC分类号： H04L27/08
CPC分类号： H04L27/14 , H03F3/189 , H03F3/343 , H03G3/3068
摘要： A method for signal strength detection begins by comparing a signal strength representation of a signal with a signal strength representation of a reference signal. The method continues by adjusting, when the signal strength representation of the signal compares unfavorably with the signal strength representation of the reference signal, at least one of the signal strength representation of the signal and the signal strength representation of the reference signal until the signal strength representation of the signal compares favorably with the signal strength representation of the reference signal. The method continues by determining signal strength of the signal based on the adjusting of the signal strength representation of the signal and signal strength of the reference signal.
摘要翻译： 用于信号强度检测的方法开始于将信号的信号强度表示与参考信号的信号强度表示进行比较。 该方法通过调节信号的信号强度表示与参考信号的信号强度表示不利地相比较，信号的信号强度表示和参考信号的信号强度表示中的至少一个直到信号强度 信号的表示与参考信号的信号强度表示相当。 该方法通过基于信号的信号强度表示和参考信号的信号强度的调整来确定信号的信号强度来继续。
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公开(公告)号：US20070072574A1
公开(公告)日：2007-03-29
申请号：US11237339
申请日：2005-09-28
申请人： Thomas Ragan , Matthew Felder , Michael May
发明人： Thomas Ragan , Matthew Felder , Michael May
IPC分类号： H04B1/26
CPC分类号： H04B1/28
摘要： A receiver includes a mixing module for mixing an input signal by at least one mixing sequence to produce a mixed signal. The mixed signal is filtered to produce a first filtered signal. A first downsampler downsamples the first filtered signal to produce a first decimated signal, wherein the decimation period is not a multiple of the mixing period.
摘要翻译： 接收机包括混合模块，用于通过至少一个混合序列混合输入信号以产生混合信号。 对混合信号进行滤波以产生第一滤波信号。 第一下采样器对第一滤波信号进行下采样以产生第一抽取信号，其中抽取周期不是混合周期的倍数。
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公开(公告)号：US20070069939A1
公开(公告)日：2007-03-29
申请号：US11498204
申请日：2006-08-01
申请人： Matthew Felder , Michael May
发明人： Matthew Felder , Michael May
IPC分类号： H03M1/12
摘要： A controlled sampling module samples an input signal from an input device and a reference signal. The controlled sampling module includes a plurality of sample capacitors, a switching network, and a switch control module for controlling the switching network. The switching network couples a first capacitor of the plurality of capacitors to the reference signal during a first phase, and to the input signal during a second phase, such that a charge on the first capacitor remaining at an end of the first phase is cancelled during the second phase.
摘要翻译： 受控采样模块从输入设备和参考信号采样输入信号。 受控采样模块包括多个采样电容器，开关网络和用于控制开关网络的开关控制模块。 开关网络在第一阶段期间将多个电容器中的第一电容器耦合到参考信号，并且在第二阶段期间耦合到输入信号，使得在第一阶段结束时剩余的第一电容器上的电荷被消除 第二阶段
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公开(公告)号：US20070071132A1
公开(公告)日：2007-03-29
申请号：US11237344
申请日：2005-09-28
申请人： Michael May , Matthew Felder
发明人： Michael May , Matthew Felder
IPC分类号： H03D3/00
CPC分类号： H03D3/007
摘要： A mixing module includes a plurality of switched sample modules operably for generating a corresponding plurality of samples of an analog input signal in response to a control signal. A control module generates a mixing sequence and a control signal based on the mixing sequence, the control signal including a sequence of sample positions at a sampling clock rate and a sequence of scale factors, the sequence of scale factors based on an oscillation, wherein the sampling clock has a sample period and wherein the sequence of sample positions repeats at a sample position period greater than a sample interval, the sample interval equal to the sample period times the number of the plurality of switched sample circuits.
摘要翻译： 混合模块包括可操作地用于响应于控制信号产生模拟输入信号的相应多个样本的多个切换采样模块。 控制模块基于混合序列产生混合序列和控制信号，该控制信号包括采样时钟速率的采样位置序列和比例因子序列，基于振荡的比例因子序列，其中， 采样时钟具有采样周期，其中采样位置序列在大于采样间隔的采样位置周期重复，采样间隔等于采样周期乘以多个开关采样电路的数量。
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公开(公告)号：US07835461B2
公开(公告)日：2010-11-16
申请号：US11281164
申请日：2005-11-16
IPC分类号： H04L27/04
CPC分类号： H03K7/08 , H03F3/191 , H03F3/217 , H03F3/24 , H04B2001/0408 , H04L25/4902
摘要： A low power radio transmitter includes an intermediate frequency stage, signal-to-pulse conversion module, and a power amplifier. The intermediate frequency stage up-converts the frequency of a base-band digital signal into an N-bit signal at the intermediate frequency. The signal-to-pulse conversion module converts the N-bit signal at the intermediate frequency into a pulse signal of M-bits at the radio frequency. As such, the signal-to-pulse conversion module is taking an N-bit signal (e.g., an 8-bit digital signal) and converting it into an M-bit pulse signal (e.g., a 1-bit pulse stream). Accordingly, the M-bit signal at the radio frequency is essentially a square-wave, which has a peak to average ratio of zero, is subsequently amplified by the power amplifier.
摘要翻译： 低功率无线电发射机包括中频级，信号到脉冲转换模块和功率放大器。 中频级将基带数字信号的频率上变频为中频的N位信号。 信号脉冲转换模块将中频处的N位信号转换为射频M位的脉冲信号。 因此，信号到脉冲转换模块正在获取N位信号（例如，8位数字信号）并将其转换为M位脉冲信号（例如，1位脉冲流）。 因此，射频的M位信号本质上是具有峰均比为零的方波，随后由功率放大器放大。
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公开(公告)号：US20090034660A1
公开(公告)日：2009-02-05
申请号：US12246403
申请日：2008-10-06
IPC分类号： H04L27/06
CPC分类号： H03K7/08 , H03F3/191 , H03F3/217 , H03F3/24 , H04B2001/0408 , H04L25/4902
摘要： A radio receiver includes a low-noise amplifier, pulse-to-signal conversion module, and intermediate frequency stage. The low-noise amplifier is operably coupled to receive and amplify an M-bit signal at a radio frequency. The M-bit signal at a radio frequency is representative of a pulse signal that is carried on a radio frequency. The pulse-to-signal conversion module demodulates the M-bit signal to produce an N-bit signal at an intermediate frequency. For example, the pulse-to-signal conversion module performs pulse-width demodulation, pulse-density demodulation, or pulse-position demodulation to recapture the N-bit signal. The intermediate frequency stage steps down the frequency of the N-bit signal to produce a base-band digital signal.
摘要翻译： 无线电接收机包括低噪声放大器，脉冲到信号转换模块和中频级。 低噪声放大器可操作地耦合以在射频上接收和放大M位信号。 无线电频率下的M位信号代表无线电频率上携带的脉冲信号。 脉冲信号转换模块解调M位信号以产生中频的N位信号。 例如，脉冲到信号转换模块执行脉冲宽度解调，脉冲密度解调或脉冲位置解调以重新捕获N位信号。 中频级降低N位信号的频率以产生基带数字信号。
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9.发明申请公开(公告)号：US20070160167A1
公开(公告)日：2007-07-12
申请号：US11328830
申请日：2006-01-09
申请人： Michael May , Erich Lowe
发明人： Michael May , Erich Lowe
IPC分类号： H04L27/00
CPC分类号： H04B1/406 , H03D5/00 , H04B1/0003
摘要： An integrated circuit includes a radio receiver for receiving a received radio signal having a plurality of channel signals, each of the plurality of channel signals being modulated at one of a corresponding plurality of carrier frequencies. The radio receiver converts a selected one of the plurality of channel signals into a demodulated signal. An interface clock generator generates a first interface clock at a first interface clock frequency that varies based on the selected one of the plurality of channel signals. The first interface clock frequency, and integer multiples of the first clock frequency are not substantially equal to the carrier frequency of the selected one of the plurality of channel signals. A driver module drives a device interface with a device based on the first interface clock.
摘要翻译： 一种集成电路包括用于接收具有多个信道信号的接收无线电信号的无线电接收机，多个信道信号中的每一个被以相应的多个载频中的一个调制。 无线电接收机将所选择的多个信道信号转换为解调信号。 接口时钟发生器以基于多个信道信号中选择的一个信道信号而变化的第一接口时钟频率生成第一接口时钟。 第一接口时钟频率和第一时钟频率的整数倍基本上不等于多个信道信号中所选择的一个的载波频率。 驱动器模块基于第一接口时钟驱动与设备的设备接口。
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10.发明申请Method to adjustably convert a first data signal having a first time domain to a second data signal having a second time domain 失效用于将具有第一时域的第一数据信号可调整地转换为具有第二时域的第二数据信号的方法公开(公告)号：US20070066265A1
公开(公告)日：2007-03-22
申请号：US11233085
申请日：2005-09-22
申请人： Michael May
发明人： Michael May
CPC分类号： H04B1/28
摘要： The present invention provides a method to adjustably sample a first digitized signal having a first data rate to produce a second digitized signal having a second data rate. This involves processing the second digitized signal to produce an output signal having a timing component contained therein. An error sensing module determines a timing error between the timing component and a digitized reference period. Then this timing error is used to produce a feedback signal that is applied to the sample timing of the first digitized signal. This allows the second digitized signal to be processed using a time domain associated with the second data rate.
摘要翻译： 本发明提供了一种可调整地采样具有第一数据速率的第一数字化信号以产生具有第二数据速率的第二数字化信号的方法。 这涉及处理第二数字化信号以产生其中包含定时分量的输出信号。 误差检测模块确定定时分量与数字化参考周期之间的定时误差。 然后，该定时误差用于产生应用于第一数字化信号的采样定时的反馈信号。 这允许使用与第二数据速率相关联的时域来处理第二数字化信号。
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