摘要:
Methods and apparatuses for parallel decoding and data processing of Turbo codes are provided. The method includes: a codeword dividing step for dividing a whole codeword into Q sub-blocks to form a plurality of boundaries between adjacent sub-blocks of the Q sub-blocks so as to decode the Q sub-blocks, wherein the decoding process comprises P times of decoding iterations, and wherein Q is a positive integer and Q>1 and P is a positive integer and P>1; and a boundary moving step for moving at least one position of the boundaries formed in a pth decoding iteration by an offset Δ before performing a (p+n)th decoding iteration, wherein p is a positive integer and 1≦p
摘要翻译:提供Turbo码并行解码和数据处理的方法和装置。 该方法包括:码字分割步骤,用于将整个码字划分为Q个子块,以在Q个子块的相邻子块之间形成多个边界,以对Q个子块进行解码,其中解码过程包括 P次解码迭代,其中Q是正整数,Q> 1,P是正整数,P> 1; 以及边界移动步骤,用于在执行第(p + n)个解码迭代之前将形成在第p解码迭代中的边界的至少一个位置移动偏移量Δt,其中p是正整数,1 <= p
摘要:
A stacked electrical connector having an insulation body, a plurality of contacts, an external case, and an internal case. The insulation body includes a pair of plugs and a separation member disposed between the pair of plugs for separating the pair of plugs. The plurality of contacts are disposed on the pair of plugs. The external case encloses the insulation body, while the internal case encloses the separation member. The internal case has at least two support legs extending out of the external case from two sides of the internal case respectively, to secure the electrical connector on a circuit board. By providing the support legs on the internal case, the material cost of the connector can be reduced and the workability of the support legs can be improved.
摘要:
A stacked electrical connector having an insulation body, a plurality of contacts, an external case, and an internal case. The insulation body includes a pair of plugs and a separation member disposed between the pair of plugs for separating the pair of plugs. The plurality of contacts are disposed on the pair of plugs. The external case encloses the insulation body, while the internal case encloses the separation member. The internal case has at least two support legs extending out of the external case from two sides of the internal case respectively, to secure the electrical connector on a circuit board. By providing the support legs on the internal case, the material cost of the connector can be reduced and the workability of the support legs can be improved.
摘要:
Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard float-point sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance under 5 bits fix-point realization as the float-point sum-product algorithm (SPA).
摘要:
Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.
摘要:
Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard float-point sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance under 5 bits fix-point realization as the float-point sum-product algorithm (SPA).
摘要:
Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum algorithm (MSA) and have almost the same performance as sum-product algorithm (SPA) under both floating precision operation and fixed-point operation.