摘要:
Identification and extraction of hybrid, frequency-hopped direct sequence pseudo noise (FH/DS), signals from a multiband signal environment is effected by a sequential signal processing technique which examines the distribution of the energy content within a prescribed sub-spectrum window that is iteratively scanned or `slides` across the overall signal spectrum of interest. Based upon this energy content distribution, in particular the extent to which a sub-spectrum window contains energy that exhibits significant conjugate phase symmetry associated with a direct spread signal, the inventive signal processing technique proceeds to emphasize the spectral composition of components of which hybrid signals are comprised and to deemphasize the spectral composition of signals other than those contained in hybrid signals. Potential hybrid signal candidates whose spectral composition has been emphasized are then selectively combined with the deemphasized signals to isolate and identify the hybrid signals.
摘要:
A low probability of intercept communication system (CCSK)--modulates information signals onto an inverse fast Fourier transformation of a large number of simultaneous frequencies that have been determined to be reasonably `quiet` within a given system bandwidth, so as to produce a time domain pulse waveform. The amplitude of each transmitted frequency is weighted. Within the receiver equipment of each participant in the system, the incoming pulse waveform produced by the inverse fast Fourier transformation mechanism at the source is coupled to a fast Fourier transform operator, so as to separate the time domain signal into a plurality of frequency components that contain the modulated data. These components are then convolved with a replica of the plurality of quiet channels to derive a time domain output waveform from which the data modulation can be identified and recovered. Even if a jamming threat is injected into one or more of the `quiet` channels that has been selected as a participating carrier, by virtue of the signal analysis and recovery process employed by each unit for incoming signals, jamming spikes are effectively excised.
摘要:
A method of performing antenna diversity in a wireless spread spectrum communication system is disclosed. A spread spectrum phase shift keyed (PSK) packet signal having data symbols formed from high rate mode chips is received in each of two respective spaced antenna of a spread spectrum receiver. The bit sync peak sample is determined within the packet signal for each antenna. Predetermined bit sync samples are subtracted a predetermined number of chips on either side of the bit sync peak sample from the peak for each antenna. The antenna having the higher value obtained in the subtracting step accomplished for each antenna is selected.
摘要:
A direct sequence spread spectrum receiver and method for acquiring radio-frequency signals is provided for acquiring data from signals which have been transmitted in a spread spectrum system. The receiver is capable of receiving short data bursts from transmitters without prior knowledge of the time or location of the transmission and rapidly acquiring the signal before continuing with reliable data demodulation. The system includes one or more antennae for receiving RF signals which may be selectively connected to provide the received signals to the system for processing, a quadrature demodulator for providing I and Q baseband signals to a digital baseband processor which includes A/D converters, dual correlators for despreading the digital I and Q signals, a cartesian to polar converter, a demodulator for demodulating the polar coordinate digital I and Q signals, and a data descrambler for obtaining a serial data stream which may be provided to a serial interface.
摘要:
A method and circuit for controlling a reference voltage for an analog-to-digital converter having plural outputs includes a sensor for indicating when outputs from the A/D converter are at least a desired voltage, and a processor responsive to the sensor and connected to a digital-to-analog converter which provides a reference voltage for the A/D converter. The processor provides signals to the D/A converter which change the reference voltage. A logic unit in the processor increments an accumulator when either an I or a Q component in the A/D converter output is at least the desired voltage and decrements the accumulator when neither the I nor the Q component is at least the desired voltage. A counter may buffer the accumulator changes by using only several of the most significant bits of the counter to change the A/D converter reference voltage.