公开(公告)号：US20050007153A1

公开(公告)日：2005-01-13

申请号：US10847018

申请日：2004-05-17

Applicant: Li Ding ,  Pinaki Mazumder

Inventor： Li Ding ,  Pinaki Mazumder

IPC: H03K19/096

CPC classification number: H03K19/0963

Abstract: A number of different dynamic circuits having improved noise tolerance and a method for designing same are provided. The circuits include a power supply node and a precharge node. Keeper circuitry is connected to the nodes and has a current-voltage characteristic that exhibits a negative differential resistance property to improve noise tolerance of the circuits.

Abstract translation: 提供了许多具有改进的噪声容限的不同动态电路及其设计方法。 电路包括电源节点和预充电节点。 Keeper电路连接到节点，并具有呈现负差分电阻特性的电流 - 电压特性，以改善电路的噪声容限。

公开(公告)号：US07088143B2

公开(公告)日：2006-08-08

申请号：US10847018

申请日：2004-05-17

Applicant: Li Ding ,  Pinaki Mazumder

Inventor： Li Ding ,  Pinaki Mazumder

IPC: H03K19/096 ,  H03K19/00 ,  H03K19/20 ,  H03K19/094

CPC classification number: H03K19/0963

Abstract: A number of different dynamic circuits having improved noise tolerance and a method for designing same are provided. The circuits include a power supply node and a precharge node. Keeper circuitry is connected to the nodes and has a current-voltage characteristic that exhibits a negative differential resistance property to improve noise tolerance of the circuits.

Abstract translation: 提供了许多具有改进的噪声容限的不同动态电路及其设计方法。 电路包括电源节点和预充电节点。 Keeper电路连接到节点，并具有呈现负差分电阻特性的电流 - 电压特性，以改善电路的噪声容限。

公开(公告)号：US20120019901A1

公开(公告)日：2012-01-26

申请号：US12842997

申请日：2010-07-23

Applicant: Pinaki Mazumder

Inventor： Pinaki Mazumder

IPC: G02F1/29

CPC classification number: G02F1/313 ,  G02B6/1226 ,  G02F1/1326 ,  G02F1/365 ,  G02F2202/30 ,  G02F2202/32 ,  G02F2203/10 ,  G02F2203/13

Abstract: A subwavelength terahertz (THz) switch using an artificially designed conductor metamaterial is discussed in this invention. Theoretically, slow-light EM wave propagating at THz speed imitates the strongly localized surface plasmon modes and henceforth is called Spoof Surface Plasmon Polariton (SSPP) mode in this invention. The SSPP mode of slow-light EM propagation can be easily tailored by changing the refractive index of the dielectric materials inside the metallic gap structure engineered as a periodic array of grooves. Thus, the incorporation of electro-optical material which has birefringence such as a nematic liquid crystal (N-LC) or multiple-refractive indices into the metallic gap leads to a highly compact and efficient terahertz switch being controlled by a low-voltage signal. The optimal design of the SSPP switch enabled by this novel method shows many interesting properties including 1) strong subwavelength localization; 2) relatively high extinction (On/Off switching) ratio; and 3) small damping attenuation. The THz dynamic switches can be used to construct linear switches, Y junction switches and Mach-Zehnder interferometers by using micromachining and other fabrication techniques.

Abstract translation: 在本发明中讨论了使用人造设计的导体超材料的亚波长太赫兹（THz）开关。 理论上，以THz速度传播的慢光EM波模拟了强定位的表面等离子体模式，此后在本发明中被称为Spoof表面等离子体偏振（SSPP）模式。 慢光EM传播的SSPP模式可以通过改变设计为周期性凹槽阵列的金属间隙结构内部的电介质材料的折射率来容易地定制。 因此，将具有双折射的电光材料（例如向列型液晶（N-LC）或多重折射率）结合到金属间隙中，导致由低电压信号控制的高度紧凑且有效的太赫兹开关。 通过这种新方法实现的SSPP开关的最佳设计显示出许多有趣的特性，包括1）强亚波长定位; 2）相对较高的消光（开/关切换）比例; 和3）小阻尼衰减。 THz动态开关可用于通过使用微加工和其他制造技术构建线性开关，Y结开关和Mach-Zehnder干涉仪。

公开(公告)号：US06323709B1

公开(公告)日：2001-11-27

申请号：US09573800

申请日：2000-05-18

Applicant: Shriram Kulkarni ,  Mayukh Bhattacharya ,  Pinaki Mazumder

Inventor： Shriram Kulkarni ,  Mayukh Bhattacharya ,  Pinaki Mazumder

IPC: H03K2380

CPC classification number: H03K3/315

Abstract: A high-speed, compact, edge-triggered flip-flop circuit is provided which includes an input circuit section, a latch circuit section and an output circuit section. The input circuit section includes at least one transistor such as a field-effect transistor (FET) which determines the logic function of the flip-flop such as D, S-R, or T, and provides a first stage of latching. The input circuit section receives the logic control signals such as D, S-R, or T, and a clock signal. In one embodiment of the invention, the latch circuit section includes two series-connected negative differential resistance (NDR) diodes. In this embodiment, a common terminal of the two NDR diodes is connected to the data output of the input circuit section and to the data input of the output circuit section. In the first embodiment, the output circuit section includes a plurality of FETs which perform second stage of latching such that the output of this section reflects the logic of the chosen inputs only at the occurrence of either a low-to-high transition or a high-to-low transition on the clock signal, but not both, depending on the chosen configuration of the flip-flop circuit. In a second embodiment, a D flip-flop circuit includes a latch circuit section which includes at least one NDR diode connected to the data output of the input circuit section and an output circuit section which also includes at least one NDR diode connected to the output of the output circuit section. In the second embodiment, the flip-flop circuit may use: 1) bistable NDR logic; 2) cascaded NDR latches; or 3) pseudo-bistable NDR logic with a true, single-phase clock.

Abstract translation: 提供了一种高速，紧凑的边沿触发电路，其包括输入电路部分，锁存电路部分和输出电路部分。 输入电路部分包括诸如场效应晶体管（FET）的至少一个晶体管，其确定诸如D，S-R或T之类的触发器的逻辑功能，并提供第一级锁存。 输入电路部分接收诸如D，S-R或T的逻辑控制信号和时钟信号。 在本发明的一个实施例中，锁存电路部分包括两个串联连接的负差分电阻（NDR）二极管。 在本实施例中，两个NDR二极管的公共端子连接到输入电路部分的数据输出端和输出电路部分的数据输入端。 在第一实施例中，输出电路部分包括执行第二级锁存的多个FET，使得该部分的输出仅在出现低到高转换或高电平时反映所选输入的逻辑 取决于所选择的触发器电路的配置，在时钟信号上的低电平转换，但不是两者。 在第二实施例中，D触发器电路包括锁存电路部分，其包括连接到输入电路部分的数据输出的至少一个NDR二极管和输出电路部分，该输出电路部分还包括连接到输出端的至少一个NDR二极管 的输出电路部分。 在第二实施例中，触发器电路可以使用：1）双稳态NDR逻辑; 2）级联NDR锁存器; 或3）具有真实的单相时钟的伪双稳态NDR逻辑。

公开(公告)号：US08842948B2

公开(公告)日：2014-09-23

申请号：US13466702

申请日：2012-05-08

Applicant: Pinaki Mazumder ,  Kyungju Song

Inventor： Pinaki Mazumder ,  Kyungju Song

IPC: G02B6/34 ,  G02B6/35 ,  G02B6/122 ,  G02B6/293 ,  G02B6/26 ,  G02B6/42

CPC classification number: G02B6/35 ,  B82Y20/00 ,  G02B6/1226 ,  G02B6/29322 ,  G02F1/3515 ,  G02F2203/10 ,  G02F2203/13 ,  G02F2203/15 ,  Y10T29/49016

Abstract: A terahertz (THz) switch consisting of perfect conductor metamaterials is discussed in this invention. Specifically, we have built a THz logic block by combining two double-sided corrugated waveguides capable of slowing down the electromagnetic waves in the THz regime with a sub-wavelength cavity, having one or more grooves with shorter height than the grooves of the periodic corrugated waveguide. This new type of THz structure is called as the waveguide-cavity-waveguide (WCW). The new invention is based on our mathematical modeling and experimentation that confirms a strong electromagnetic field accumulation inside the tiny cavity which can confine EM field for a long time within a very small effective volume (Veff) to provide high quality (Q) factor. Therefore, an efficient THz switch can be designed to achieve ON-OFF switching functionality by modulating the refractive index n or extinction coefficient α inside the switching junction. The dimensions of the periodic structure and cavity can be optimized to apply the invention to slow-EM wave devices working at other frequencies in the EM spectrum including the microwave and outside the THz domain which is generally accepted as from 0.3 THz to 3 THz.

Abstract translation: 在本发明中讨论了由完美导体超材料组成的太赫兹（THz）开关。 具体来说，我们已经构建了一个THz逻辑块，通过组合两个双面波纹波导，能够使用亚波长腔减慢THz区域的电磁波，具有一个或多个比周期性波纹状槽的槽高的槽 波导。 这种新型的THz结构被称为波导腔波导（WCW）。 新发明是基于我们的数学建模和实验，确认了微小空腔内强大的电磁场积聚，可以在非常小的有效体积（Veff）内将EM场长时间限制在一起，从而提供高质量（Q）因子。 因此，可以设计有效的THz开关以通过调制开关结内的折射率n或消光系数α来实现ON-OFF开关功能。 可以优化周期性结构和空腔的尺寸，以将本发明应用于在包括微波和在THz域外的EM频谱中的其他频率工作的慢EM波装置，其通常被接受为0.3THz至3THz。

公开(公告)号：US08837036B2

公开(公告)日：2014-09-16

申请号：US12842997

申请日：2010-07-23

Applicant: Pinaki Mazumder

Inventor： Pinaki Mazumder

IPC: G02F1/29 ,  G02F1/13 ,  G02F1/313 ,  G02F1/365

CPC classification number: G02F1/313 ,  G02B6/1226 ,  G02F1/1326 ,  G02F1/365 ,  G02F2202/30 ,  G02F2202/32 ,  G02F2203/10 ,  G02F2203/13

Abstract: A subwavelength terahertz switch using an artificially designed conductor metamaterial is discussed in this invention. Slow-light EM Wave propagating at THZ speed imitates the strongly localized surface plasmon modes and henceforth is called Spoof Surface Plasmon Polariton (SSPP) in this invention. The SSPP mode of slow-light EM propagation can be easily tailored by changing the refractive index of the dielectric materials inside the metallic gap structure engineered as a periodic array of grooves. Thus, the incorporation of electro-optical material which has birefringence such as a nematic liquid crystal (N-LC) or multiple refractive indices into the metallic gap leads to a highly compact and efficient terahertz switch being controlled by a low voltage signal. The THZ dynamic switches can be used to construct linear switches, Y junction switches and Mach Zehnder interferometers.

Abstract translation: 本发明讨论了使用人造设计的导体超材料的亚波长太赫兹开关。 在THZ速度下传播的慢光EM波模拟强烈局部化的表面等离子体激元模式，从而在本发明中称为Spoof表面等离子体极化（Spoof Surface Plasmon Polariton，SSPP）。 慢光EM传播的SSPP模式可以通过改变设计为周期性凹槽阵列的金属间隙结构内部的电介质材料的折射率来容易地定制。 因此，将具有双折射的电光材料（例如向列型液晶（N-LC）或多重折射率）结合到金属间隙中，导致由低电压信号控制的高度紧凑且有效的太赫兹开关。 THZ动态开关可用于构造线性开关，Y结开关和Mach Zehnder干涉仪。

公开(公告)号：US20130301983A1

公开(公告)日：2013-11-14

申请号：US13466702

申请日：2012-05-08

Applicant: Pinaki Mazumder ,  Kyungjun Song

Inventor： Pinaki Mazumder ,  Kyungjun Song

IPC: G02B6/35

CPC classification number: G02B6/35 ,  B82Y20/00 ,  G02B6/1226 ,  G02B6/29322 ,  G02F1/3515 ,  G02F2203/10 ,  G02F2203/13 ,  G02F2203/15 ,  Y10T29/49016

Abstract: A terahertz (THz) switch consisting of perfect conductor metamaterials is discussed in this invention. Specifically, we have built a THz logic block by combining two double-sided corrugated waveguides capable of slowing down the electromagnetic waves in the THz regime with a sub-wavelength cavity, having one or more grooves with shorter height than the grooves of the periodic corrugated waveguide. This new type of THz structure is called as the waveguide-cavity-waveguide (WCW). The new invention is based on our mathematical modeling and experimentation that confirms a strong electromagnetic field accumulation inside the tiny cavity which can confine EM field for a long time within a very small effective volume (Veff) to provide high quality (Q) factor. Therefore, an efficient THz switch can be designed to achieve ON-OFF switching functionality by modulating the refractive index n or extinction coefficient α inside the switching junction. The dimensions of the periodic structure and cavity can be optimized to apply the invention to slow-EM wave devices working at other frequencies in the EM spectrum including the microwave and outside the THz domain which is generally accepted as from 0.3 THz to 3 THz.

Abstract translation: 在本发明中讨论了由完美导体超材料组成的太赫兹（THz）开关。 具体来说，我们已经构建了一个THz逻辑块，通过组合两个双面波纹波导，能够使用亚波长腔减慢THz区域的电磁波，具有一个或多个比周期性波纹状槽的槽高的槽 波导。 这种新型的THz结构被称为波导腔波导（WCW）。 新发明是基于我们的数学建模和实验，确认了微小空腔内强大的电磁场积聚，可以在非常小的有效体积（Veff）内将EM场长时间限制在一起，从而提供高质量（Q）因子。 因此，可以设计有效的THz开关，以通过调制开关结中的折射率n或消光系数α来实现ON-OFF开关功能。 可以优化周期性结构和空腔的尺寸，以将本发明应用于在包括微波和在THz域外的EM频谱中的其他频率工作的慢EM波装置，其通常被接受为0.3THz至3THz。

公开(公告)号：US5903170A

公开(公告)日：1999-05-11

申请号：US868270

申请日：1997-06-03

Applicant: Shriram Kulkarni ,  Pinaki Mazumder ,  George I. Haddad

Inventor： Shriram Kulkarni ,  Pinaki Mazumder ,  George I. Haddad

IPC: H03K19/0944 ,  H03K19/10

CPC classification number: B82Y10/00 ,  H03K19/09441 ,  H03K19/10

Abstract: A digital logic gate circuit including a logic block, clock transistor, bias transistor and a negative differential resistance (NDR) diode which acts as an active load for the circuit. The logic block, comprising a plurality of field effect transistors whose control terminals receive the set of input signals to the logic gate, determines the gate function such as inversion, NAND, NOR, MAJORITY, etc. The clock transistor is connected in series with the logic block and the bias transistor is connected in parallel across this series combination. The terminal of the NDR diode affixed to the common terminal of the bias transistor and the logic block forms the output for the logic circuit. NDR diodes include but are not limited to devices such as tunnel diodes and resonant tunneling diodes (RTDs). The folded I-V characteristic of an NDR diode allows the circuits to operate in a bistable clocked mode, where the circuit output latches its state and changes only when the clock signal is active. The circuit topology allows logic functions to be implemented in a compact manner, thus reducing the propagation delay for the signals, and reducing the overall complexity and delay of arbitrary logic circuits. Thus, performance improvements result from the compactness of logic design as well as the elimination of a pipeline latch area and delay overheads.

Abstract translation: 数字逻辑门电路包括逻辑块，时钟晶体管，偏置晶体管和用作电路的有源负载的负差分电阻（NDR）二极管。 该逻辑块包括多个场效应晶体管，其控制端接收到逻辑门的输入信号，确定诸如反相，NAND，NOR，NOR，MAJORITY等门功能。时钟晶体管与 逻辑块和偏置晶体管并联连接在该串联组合上。 固定在偏置晶体管的公共端子上的NDR二极管的端子和逻辑块形成逻辑电路的输出。 NDR二极管包括但不限于诸如隧道二极管和谐振隧道二极管（RTD）的器件。 NDR二极管的折叠I-V特性允许电路以双稳态时钟模式工作，其中电路输出锁存其状态，只有在时钟信号有效时才会改变。 电路拓扑允许以紧凑的方式实现逻辑功能，从而减少信号的传播延迟，并降低任意逻辑电路的整体复杂度和延迟。 因此，性能改进是由于逻辑设计的紧凑性以及消除流水线锁存区域和延迟开销造成的。