公开(公告)号：US08878304B2

公开(公告)日：2014-11-04

申请号：US13358242

申请日：2012-01-25

申请人： Li-Wen Fang ,  Chih-Hao Yang ,  An-Tung Chen

发明人： Li-Wen Fang ,  Chih-Hao Yang ,  An-Tung Chen

IPC分类号： H01L27/06 ,  G11C29/00 ,  H01L27/02

CPC分类号： G11C29/785 ,  H01L27/0255 ,  H01L27/0617

摘要： The present invention discloses a fuse circuit for final test trimming of an integrated circuit (IC) chip. The fuse circuit includes at least one electrical fuse, at least one control switch corresponding to the electrical fuse, and a resistant device. The electrical fuse is connected with the control switch in series between a predetermined pin and a grounding pin. The control switch receives a control signal to determine whether a predetermined current flows through the corresponding electrical fuse and breaks the electrical fuse. The resistant device is coupled between a bulk terminal and a source terminal to increase a resistance of a parasitic channel, such that an electrostatic discharge (ESD) protection is enhanced, and errors of final test trimming of an IC chip are avoided.

摘要翻译： 本发明公开了一种用于集成电路（IC）芯片的最终测试修整的熔丝电路。 熔断器电路包括至少一个电熔丝，对应于电熔丝的至少一个控制开关和一个电阻装置。 电保险丝与控制开关串联连接在预定的引脚和接地引脚之间。 控制开关接收控制信号以确定预定电流是否流过相应的电熔丝并断开电熔丝。 电阻器件耦合在体端子和源极端子之间以增加寄生沟道的电阻，从而增强了静电放电（ESD）保护，并且避免了IC芯片的最终测试修整的误差。

公开(公告)号：US20130113049A1

公开(公告)日：2013-05-09

申请号：US13358242

申请日：2012-01-25

申请人： LI-WEN FANG ,  Chih-Hao Yang ,  An-Tung Chen

发明人： LI-WEN FANG ,  Chih-Hao Yang ,  An-Tung Chen

IPC分类号： H01L27/06

CPC分类号： G11C29/785 ,  H01L27/0255 ,  H01L27/0617

摘要： The present invention discloses a fuse circuit for final test trimming of an integrated circuit (IC) chip. The fuse circuit includes at least one electrical fuse, at least one control switch corresponding to the electrical fuse, and a resistant device. The electrical fuse is connected with the control switch in series between a predetermined pin and a grounding pin. The control switch receives a control signal to determine whether a predetermined current flows through the corresponding electrical fuse and breaks the electrical fuse. The resistant device is coupled between a bulk terminal and a source terminal to increase a resistance of a parasitic channel, such that an electrostatic discharge (ESD) protection is enhanced, and errors of final test trimming of an IC chip are avoided.

摘要翻译： 本发明公开了一种用于集成电路（IC）芯片的最终测试修整的熔丝电路。 熔断器电路包括至少一个电熔丝，对应于电熔丝的至少一个控制开关和一个电阻装置。 电保险丝与控制开关串联连接在预定的引脚和接地引脚之间。 控制开关接收控制信号以确定预定电流是否流过相应的电熔丝并断开电熔丝。 电阻器件耦合在体端子和源极端子之间以增加寄生沟道的电阻，从而增强了静电放电（ESD）保护，并且避免了IC芯片的最终测试修整的误差。

公开(公告)号：US08179059B2

公开(公告)日：2012-05-15

申请号：US12579802

申请日：2009-10-15

申请人： Chih-Hao Yang ,  Fu-Yuan Shih ,  An-Tung Chen ,  Shui-Mu Lin

发明人： Chih-Hao Yang ,  Fu-Yuan Shih ,  An-Tung Chen ,  Shui-Mu Lin

IPC分类号： G05F1/00 ,  H05B37/02 ,  H05B39/04 ,  H05B41/36 ,  H05B37/00 ,  H05B39/00 ,  H05B41/00

CPC分类号： H05B33/0887 ,  H05B33/0815 ,  H05B33/0827 ,  Y02B20/347

摘要： The present invention discloses a circuit and a method for controlling a light emitting device, and an integrated circuit therefore. The circuit for controlling a light emitting device comprises: a power stage controller circuit controlling a power stage circuit to convert an input voltage to an output voltage, which is supplied to at least one light emitting device channel including at least one light emitting device; a transistor switch in the light emitting device channel; and a current source circuit controlling a current through the light emitting device channel, wherein the power stage controller circuit and the current source circuit are integrated in an integrated circuit which provides a control voltage to control a gate of the transistor switch.

摘要翻译： 本发明公开了一种用于控制发光器件的电路和方法，以及集成电路。 用于控制发光器件的电路包括：功率级控制器电路，其控制功率级电路以将输入电压转换为输出电压，所述输出电压被提供给包括至少一个发光器件的至少一个发光器件通道; 发光器件通道中的晶体管开关; 以及电流源电路，其控制通过所述发光器件沟道的电流，其中所述功率级控制器电路和所述电流源电路集成在提供控制电压以控制所述晶体管开关的栅极的集成电路中。

公开(公告)号：US20110089854A1

公开(公告)日：2011-04-21

申请号：US12579802

申请日：2009-10-15

申请人： Chih-Hao Yang ,  Fu-Yuan Shih ,  An-Tung Chen ,  Shui-Mu Lin

发明人： Chih-Hao Yang ,  Fu-Yuan Shih ,  An-Tung Chen ,  Shui-Mu Lin

IPC分类号： H05B37/02

CPC分类号： H05B33/0887 ,  H05B33/0815 ,  H05B33/0827 ,  Y02B20/347

摘要： The present invention discloses a circuit and a method for controlling a light emitting device, and an integrated circuit therefore. The circuit for controlling a light emitting device comprises: a power stage controller circuit controlling a power stage circuit to convert an input voltage to an output voltage, which is supplied to at least one light emitting device channel including at least one light emitting device; a transistor switch in the light emitting device channel; and a current source circuit controlling a current through the light emitting device channel, wherein the power stage controller circuit and the current source circuit are integrated in an integrated circuit which provides a control voltage to control a gate of the transistor switch.

摘要翻译： 本发明公开了一种用于控制发光器件的电路和方法，以及集成电路。 用于控制发光器件的电路包括：功率级控制器电路，其控制功率级电路以将输入电压转换为输出电压，所述输出电压被提供给包括至少一个发光器件的至少一个发光器件通道; 发光器件通道中的晶体管开关; 以及电流源电路，其控制通过所述发光器件沟道的电流，其中所述功率级控制器电路和所述电流源电路集成在提供控制电压以控制所述晶体管开关的栅极的集成电路中。

公开(公告)号：US08791678B2

公开(公告)日：2014-07-29

申请号：US13188867

申请日：2011-07-22

申请人： Ting-Jung Tai ,  Chih-Hao Yang ,  An-Tung Chen

发明人： Ting-Jung Tai ,  Chih-Hao Yang ,  An-Tung Chen

IPC分类号： H02M3/156

CPC分类号： H02M3/156

摘要： A control circuit of a switching DC-DC power supply includes a feedback circuit detecting an output voltage of the power supply to generate a feedback signal, an error comparator detecting an error between the output voltage and a design value of the output voltage, a control logic circuit generating a control signal according to the error for regulating the output voltage, and an offset and delay cancellation circuit generating an offset adjust signal according to the feedback signal and a second reference voltage for adjusting an offset of the error comparator to pull the output voltage toward the design value.

摘要翻译： 开关DC-DC电源的控制电路包括检测电源的输出电压以产生反馈信号的反馈电路，检测输出电压与输出电压的设计值之间的误差的误差比较器，控制 逻辑电路根据用于调节输出电压的误差产生控制信号，以及偏移和延迟消除电路，根据反馈信号产生偏移调整信号，第二参考电压用于调整误差比较器的偏移量以将输出 电压达到设计值。

公开(公告)号：US08446135B2

公开(公告)日：2013-05-21

申请号：US13404520

申请日：2012-02-24

申请人： An-Tung Chen ,  Chih-Hao Yang

发明人： An-Tung Chen ,  Chih-Hao Yang

IPC分类号： G05F1/56

CPC分类号： H02M3/156 ,  H02M2001/0025

摘要： A control circuit and method for a ripple regulator system generate a ripple signal in-phase and synchronous with an inductor current of the ripple regulator system, and extract a ripple information proportional to the amplitude of the ripple signal. The ripple signal is used for triggering control in PWM signal generation to make the ripple regulator system have small ripples and better loop stability simultaneously. The ripple information is used to improve the output offset of the ripple regulator system that is caused by the ripple signal.

摘要翻译： 用于纹波调节器系统的控制电路和方法与纹波调节器系统的电感电流同相产生纹波信号，并提取与纹波信号幅度成比例的纹波信息。 纹波信号用于触发PWM信号生成中的控制，使波纹调节器系统同时具有小波纹和更好的环路稳定性。 纹波信息用于改善由纹波信号引起的纹波调节器系统的输出偏移。

公开(公告)号：US20090066399A1

公开(公告)日：2009-03-12

申请号：US12230953

申请日：2008-09-09

申请人： An-Tung Chen ,  Li-Wen Fang ,  Hung-Der Su

发明人： An-Tung Chen ,  Li-Wen Fang ,  Hung-Der Su

IPC分类号： H03L5/00

CPC分类号： H03K3/012 ,  H03K3/35613

摘要： A level shift circuit includes an input stage and an output stage coupled to each other by two nodes. The input stage changes the voltages on the nodes according to an input signal, and the output stage determines an output signal according to the voltages on the two nodes. In a transition state, the input stage provides a large current to charge or discharge the first node or the second node so as to quickly change the voltage thereon. In a steady state, the input stage lowers the current so as to reduce power consumption.

摘要翻译： 电平移位电路包括通过两个节点彼此耦合的输入级和输出级。 输入级根据输入信号改变节点上的电压，输出级根据两个节点上的电压来确定输出信号。 在过渡状态下，输入级提供大电流以对第一节点或第二节点进行充电或放电，以便快速地改变其上的电压。 在稳定状态下，输入级降低电流，从而降低功耗。

公开(公告)号：US07839197B2

公开(公告)日：2010-11-23

申请号：US12230953

申请日：2008-09-09

申请人： An-Tung Chen ,  Li-Wen Fang ,  Hung-Der Su

发明人： An-Tung Chen ,  Li-Wen Fang ,  Hung-Der Su

IPC分类号： H03L5/00

CPC分类号： H03K3/012 ,  H03K3/35613

摘要： A level shift circuit includes an input stage and an output stage coupled to each other by two nodes. The input stage changes the voltages on the nodes according to an input signal, and the output stage determines an output signal according to the voltages on the two nodes. In a transition state, the input stage provides a large current to charge or discharge the first node or the second node so as to quickly change the voltage thereon. In a steady state, the input stage lowers the current so as to reduce power consumption.

摘要翻译： 电平移位电路包括由两个节点彼此耦合的输入级和输出级。 输入级根据输入信号改变节点上的电压，输出级根据两个节点上的电压来确定输出信号。 在过渡状态下，输入级提供大电流以对第一节点或第二节点进行充电或放电，以便快速地改变其上的电压。 在稳定状态下，输入级降低电流，从而降低功耗。

公开(公告)号：US20110018514A1

公开(公告)日：2011-01-27

申请号：US12658692

申请日：2010-02-12

申请人： An-Tung Chen ,  Li-Wen Fang

发明人： An-Tung Chen ,  Li-Wen Fang

IPC分类号： G05F1/10

CPC分类号： H02M3/1588 ,  H02M2001/0032 ,  H02M2001/0048 ,  Y02B70/1466 ,  Y02B70/1491 ,  Y02B70/16

摘要： The present invention discloses a dual-mode buck switching regulator, comprising: a first power transistor having an end coupled to an input voltage and another end coupled to a common node; an inductor having an end coupled to the common node and another end coupled to the input voltage; a second power transistor having an end coupled to ground; a diode having an end coupled to ground; and a control circuit generating a first and a second switch control signals for controlling operations of the first and the second power transistors according to a feedback signal, and generating a mode selection signal according a mode control signal to select a synchronous or an asynchronous mode, wherein the second power transistor has another end which is coupled to the common node in the synchronous mode, and the diode has another end which is coupled to the common node in the asynchronous mode, and in the asynchronous mode: the another end of the second power transistor is not coupled to the common mode, or the second power transistor maintains off. The present invention also relates to a control circuit of the dual-mode buck switching regulator.

摘要翻译： 本发明公开了一种双模降压开关调节器，包括：第一功率晶体管，其一端耦合到输入电压，另一端耦合到公共节点; 电感器，其端部耦合到公共节点，另一端耦合到输入电压; 第二功率晶体管，其端部耦合到地; 二极管，其一端与地耦合; 以及控制电路，根据反馈信号产生用于控制第一和第二功率晶体管的操作的第一和第二开关控制信号，并且根据模式控制信号产生模式选择信号以选择同步或异步模式， 其中所述第二功率晶体管具有以同步模式耦合到所述公共节点的另一端，并且所述二极管具有以所述异步模式耦合到所述公共节点并且处于所述异步模式的另一端：所述第二功率晶体管的另一端 功率晶体管不耦合到共模，或者第二功率晶体管保持断开。 本发明还涉及双模降压开关调节器的控制电路。

公开(公告)号：US08884942B2

公开(公告)日：2014-11-11

申请号：US12885959

申请日：2010-09-20

申请人： An-Tung Chen ,  Chih-Hao Yang

发明人： An-Tung Chen ,  Chih-Hao Yang

IPC分类号： G06F3/038 ,  G06F3/041 ,  H05B33/08

CPC分类号： H05B33/0851

摘要： A hysteretic mode LED driver for providing a driving current for an LED includes a hysteretic comparing circuit and a feedback loop. The hysteretic comparing circuit compares a driving current related sensing signal with a reference signal to control the average value of the driving current. The feedback loop senses the error between the average value of the driving current and a target value to adjust the reference signal or the offset of the hysteretic comparing circuit to adjust the average value of the driving current.

摘要翻译： 用于为LED提供驱动电流的迟滞模式LED驱动器包括迟滞比较电路和反馈回路。 迟滞比较电路将驱动电流相关感测信号与参考信号进行比较，以控制驱动电流的平均值。 反馈回路检测驱动电流的平均值与目标值之间的误差，以调整参考信号或滞后比较电路的偏移量，以调整驱动电流的平均值。