公开(公告)号：US08946120B2

公开(公告)日：2015-02-03

申请号：US13327724

申请日：2011-12-15

Applicant: Lin Gan

Inventor： Lin Gan

IPC: A01N59/14 ,  A01N61/00 ,  C05D9/02 ,  C01B35/10

CPC classification number: C05D9/02 ,  C01B35/1036 ,  C01B35/1045

Abstract: A method for preparing a boron fertilizer, including: (1) heating boric acid to a temperature of 180-200° C., maintaining the temperature for 20-30 min for dehydration of the boric acid to yield pyroboric acid; and (2) cooling down the pyroboric acid to a temperature of 40-60° C., crushing, and screening to yield a powdered, weakly acidic, high-content boron fertilizer. The method is energy-saving, environmentally friendly, and low in cost. The resulting boron fertilizer is weakly acidic, fast in dissolution rate, and has excellent in compounding performance

Abstract translation: 一种制备硼肥的方法，包括：（1）将硼酸加热至180-200℃，保持温度20-30分钟，使硼酸脱水得到焦硼酸; 和（2）将焦硼酸冷却至40-60℃的温度，进行粉碎和筛选以产生粉末状，弱酸性的高含量硼肥料。 该方法节能环保，成本低。 所得硼肥呈弱酸性，溶解速度快，复合性能优异

公开(公告)号：US20090186399A1

公开(公告)日：2009-07-23

申请号：US12302502

申请日：2007-06-25

Applicant: Ping Xu ,  Dongliang Hua ,  Shan Lin ,  Lifu Song ,  Cuiqing Ma ,  Zhaobin Zhang ,  Yi Du ,  Hong Chen ,  Lin Gan ,  Zhonghao Wei ,  Yiyong Zeng

Inventor： Ping Xu ,  Dongliang Hua ,  Shan Lin ,  Lifu Song ,  Cuiqing Ma ,  Zhaobin Zhang ,  Yi Du ,  Hong Chen ,  Lin Gan ,  Zhonghao Wei ,  Yiyong Zeng

IPC: C12N1/20

CPC classification number: C12R1/465 ,  C12P7/24

Abstract: A method of vanillin production from ferulic acid with a high concentration by biotransformation using a Streptomyces sp. strain is claimed in this invention. This strain is named as Streptomyces sp. V-1, which has been deposited in China Center for Type Culture Collection on Jul. 12, 2006 with the number of CCTCC M 206065. Using this strain, high concentration of vanillin fermentation broth is obtained from ferulic acid by biotransformation in GY biotransformation medium. With the addition of macroporous adsorbent resin DM11, the concentration of vanillin can be greatly improved. The advantage of this invention is less environmental pollution, high product concentration, less by-product, short processing cycle, low production cost, simple product extraction, clean production process, product environmental friendly, safe and reliable, which solves many difficulties in the vanillin production from botanical raw material extraction or chemical synthesis, and therefore it has good application prospect.

Abstract translation: 通过使用链霉菌（Streptomyces sp。）通过生物转化从高浓度的阿魏酸生产香草醛的方法。 应变在本发明中要求保护。 该菌株被命名为Streptomyces sp。 V-1已于2006年7月12日以CCTCC M 206065号存于中国型号培养物中心中心。使用该菌株，通过生物转化在GY生物转化培养基中从阿魏酸获得高浓度的香草醛发酵液 。 通过添加大孔吸附树脂DM11，可以大大提高香草醛的浓度。 本发明的优点是环境污染少，产品浓缩少，加工周期短，生产成本低，产品提取简单，生产过程简单，产品环保，安全可靠，解决了香草醛中的许多困难 生产从植物原料提取或化学合成，因此具有良好的应用前景。

公开(公告)号：US20080252335A1

公开(公告)日：2008-10-16

申请号：US12144493

申请日：2008-06-23

Applicant: Licai Fang ,  Lin Gan ,  Shunguang Ding ,  Jyshyang Chen

Inventor： Licai Fang ,  Lin Gan ,  Shunguang Ding ,  Jyshyang Chen

IPC: H03K19/177

CPC classification number: G06F11/1433

Abstract: A system for FPGA (Field Programmable Gate Array) upgrade includes: an FPGA, a FLASH memory and a CPLD. The FLASH memory includes a first section configured to store a workable version of bit files for the FPGA and a second section configured to store a backup version of bit files for the FPGA. The CPLD is coupled to the FPGA and the FLASH memory. The CPLD is configured to download the bit files from the FLASH memory to the FPGA to provide the FPGA with functionality. As a result: the CPLD communicates with CPU to upgrade the bit files in the FLASH memory, and indicates to the CPU which version of bit files has been downloaded to the FPGA.

Abstract translation: FPGA（现场可编程门阵列）升级系统包括：FPGA，FLASH存储器和CPLD。 闪存存储器包括被配置为存储用于FPGA的位文件的可工作版本的第一部分和被配置为存储用于FPGA的位文件的备份版本的第二部分。 CPLD耦合到FPGA和FLASH存储器。 CPLD配置为将位文件从FLASH存储器下载到FPGA，为FPGA提供功能。 因此，CPLD与CPU通信以升级FLASH存储器中的位文件，并向CPU指示哪些版本的位文件已下载到FPGA。

公开(公告)号：US07391237B2

公开(公告)日：2008-06-24

申请号：US11207355

申请日：2005-08-18

Applicant: Licai Fang ,  Lin Gan ,  Shunguang Ding ,  Jyshyang Chen

Inventor： Licai Fang ,  Lin Gan ,  Shunguang Ding ,  Jyshyang Chen

IPC: G06F11/20 ,  G06F11/14

CPC classification number: G06F11/1433

Abstract: A system for FPGA (Field Programmable Gate Array) upgrade includes: an FPGA, a FLASH memory and a CPLD. The FLASH memory includes a first section configured to store a workable version of bit files for the FPGA and a second section configured to store a backup version of bit files for the FPGA. The CPLD is coupled to the FPGA and the FLASH memory. The CPLD is configured to download the bit files from the FLASH memory to the FPGA to provide the FPGA with functionality. As a result, the CPLD communicates with CPU to upgrade the bit files in the FLASH memory, and indicates to the CPU which version of bit files has been downloaded to the FPGA.

Abstract translation: FPGA（现场可编程门阵列）升级系统包括：FPGA，FLASH存储器和CPLD。 闪存存储器包括被配置为存储用于FPGA的位文件的可工作版本的第一部分和被配置为存储用于FPGA的位文件的备份版本的第二部分。 CPLD耦合到FPGA和FLASH存储器。 CPLD配置为将位文件从FLASH存储器下载到FPGA，为FPGA提供功能。 因此，CPLD与CPU通信以升级FLASH存储器中的位文件，并向CPU指示哪些版本的位文件已下载到FPGA。

公开(公告)号：US20060244484A1

公开(公告)日：2006-11-02

申请号：US11207355

申请日：2005-08-18

Applicant: Licai Fang ,  Lin Gan ,  Shunguang Ding ,  Jyshyang Chen

Inventor： Licai Fang ,  Lin Gan ,  Shunguang Ding ,  Jyshyang Chen

IPC: H03K19/173

CPC classification number: G06F11/1433

Abstract: A system for FPGA (Field Programmable Gate Array) upgrade includes: an FPGA, a FLASH memory and a CPLD. The FLASH memory includes a first section configured to store a workable version of bit files for the FPGA and a second section configured to store a backup version of bit files for the FPGA. The CPLD is coupled to the FPGA and the FLASH memory. The CPLD is configured to download the bit files from the FLASH memory to the FPGA to provide the FPGA with functionality. As a result, the CPLD communicates with CPU to upgrade the bit files in the FLASH memory, and indicates to the CPU which version of bit files has been downloaded to the FPGA.

Abstract translation: FPGA（现场可编程门阵列）升级系统包括：FPGA，FLASH存储器和CPLD。 闪存存储器包括被配置为存储用于FPGA的位文件的可工作版本的第一部分和被配置为存储用于FPGA的位文件的备份版本的第二部分。 CPLD耦合到FPGA和FLASH存储器。 CPLD配置为将位文件从FLASH存储器下载到FPGA，为FPGA提供功能。 因此，CPLD与CPU通信以升级FLASH存储器中的位文件，并向CPU指示哪些版本的位文件已下载到FPGA。

公开(公告)号：US07772882B2

公开(公告)日：2010-08-10

申请号：US12144493

申请日：2008-06-23

Applicant: Licai Fang ,  Lin Gan ,  Shunguang Ding ,  Jyshyang Chen

Inventor： Licai Fang ,  Lin Gan ,  Shunguang Ding ,  Jyshyang Chen

IPC: H03K19/173 ,  G06F11/20 ,  G06F11/14

CPC classification number: G06F11/1433

Abstract: A system for FPGA (Field Programmable Gate Array) upgrade includes: an FPGA, a FLASH memory and a CPLD. The FLASH memory includes a first section configured to store a workable version of bit files for the FPGA and a second section configured to store a backup version of bit files for the FPGA. The CPLD is coupled to the FPGA and the FLASH memory. The CPLD is configured to download the bit files from the FLASH memory to the FPGA to provide the FPGA with functionality. As a result, the CPLD communicates with CPU to upgrade the bit files in the FLASH memory, and indicates to the CPU which version of bit files has been downloaded to the FPGA.

Abstract translation: FPGA（现场可编程门阵列）升级系统包括：FPGA，FLASH存储器和CPLD。 闪存存储器包括被配置为存储用于FPGA的位文件的可工作版本的第一部分和被配置为存储用于FPGA的位文件的备份版本的第二部分。 CPLD耦合到FPGA和FLASH存储器。 CPLD配置为将位文件从FLASH存储器下载到FPGA，为FPGA提供功能。 因此，CPLD与CPU通信以升级FLASH存储器中的位文件，并向CPU指示哪些版本的位文件已下载到FPGA。