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1.发明授权System, method and computer program product for providing a programmable quiesce filtering register 失效用于提供可编程静态滤波寄存器的系统，方法和计算机程序产品公开(公告)号：US08140834B2
公开(公告)日：2012-03-20
申请号：US12037808
申请日：2008-02-26
CPC分类号： G06F9/4812
摘要： A system, method and computer program product for providing a programmable quiesce filtering register. The method includes receiving a quiesce interruption request at the processor. The processor is executing in a mode. A filtering zone associated with the mode is identified. It is determined if the quiesce interruption request can be filtered by the processor. The determining is responsive to the filtering zone and to contents of a programmable filtering register for indicating exceptions to filtering performed by the receiving processor. The quiesce interruption request is filtered in response to determining that the request can be filtered.
摘要翻译： 一种用于提供可编程静态滤波寄存器的系统，方法和计算机程序产品。 该方法包括在处理器处接收静止中断请求。 处理器正在以一种模式执行。 识别与该模式相关联的过滤区域。 确定处理器是否可以过滤停顿中断请求。 该确定响应于过滤区域和可编程过滤寄存器的内容，用于指示接收处理器执行的过滤异常。 响应于确定可以对请求进行过滤，过滤掉静默中断请求。
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2.发明授权System, method and computer program product for providing a programmable quiesce filtering register 有权用于提供可编程静态滤波寄存器的系统，方法和计算机程序产品公开(公告)号：US08332614B2
公开(公告)日：2012-12-11
申请号：US13372603
申请日：2012-02-14
IPC分类号： G06F12/10
CPC分类号： G06F9/4812
摘要： Storing translation lookaside buffer (TLB) entries are in a TLB1 at the processor. The TLB1 includes entries associated with main storage accesses of programs executing in a guest mode in a current zone and entries associated with main storage accesses of firmware executing in a host mode. A quiesce interruption request is received at the processor that includes a requesting zone indicator. The processor is either executing in the host mode and has no zone or in the guest mode with the current zone. The requesting zone indicator and the contents of a programmable filtering register that indicates exceptions to filtering performed by the processor is used to determine if filtering should be performed. The quiesce interruption request may be filtered based on the requesting zone indicator even after the mode switches from the guest mode to the host mode.
摘要翻译： 存储翻译后备缓冲区（TLB）条目位于处理器的TLB1中。 TLB1包括与在当前区域中以访客模式执行的程序的主存储访问相关联的条目和与以主机模式执行的固件的主存储访问相关联的条目。 在包括请求区域指示符的处理器处接收到静默中断请求。 处理器正在主机模式下执行，并且没有区域，或者在访问模式下使用当前区域。 请求区域指示符和指示处理器执行的过滤异常的可编程过滤寄存器的内容用于确定是否应执行过滤。 即使模式从客户模式切换到主机模式，也可以基于请求区域指示符来过滤停顿中断请求。
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3.发明申请SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR PROVIDING A PROGRAMMABLE QUIESCE FILTERING REGISTER 有权用于提供可编程QUIESCE FILTERING寄存器的系统，方法和计算机程序产品公开(公告)号：US20120144154A1
公开(公告)日：2012-06-07
申请号：US13372603
申请日：2012-02-14
IPC分类号： G06F12/10
CPC分类号： G06F9/4812
摘要： Storing translation lookaside buffer (TLB) entries are in a TLB1 at the processor. The TLB1 includes entries associated with main storage accesses of programs executing in a guest mode in a current zone and entries associated with main storage accesses of firmware executing in a host mode. A quiesce interruption request is received at the processor that includes a requesting zone indicator. The processor is either executing in the host mode and has no zone or in the guest mode with the current zone. The requesting zone indicator and the contents of a programmable filtering register that indicates exceptions to filtering performed by the processor is used to determine if filtering should be performed. The quiesce interruption request may be filtered based on the requesting zone indicator even after the mode switches from the guest mode to the host mode.
摘要翻译： 存储翻译后备缓冲区（TLB）条目位于处理器的TLB1中。 TLB1包括与在当前区域中以访客模式执行的程序的主存储访问相关联的条目和与以主机模式执行的固件的主存储访问相关联的条目。 在包括请求区域指示符的处理器处接收到静默中断请求。 处理器正在主机模式下执行，并且没有区域，或者在访问模式下使用当前区域。 请求区域指示符和指示处理器执行的过滤异常的可编程过滤寄存器的内容用于确定是否应执行过滤。 即使模式从客户模式切换到主机模式，也可以基于请求区域指示符来过滤停顿中断请求。
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4.发明申请SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR PROVIDING A PROGRAMMABLE QUIESCE FILTERING REGISTER 失效用于提供可编程QUIESCE FILTERING寄存器的系统，方法和计算机程序产品公开(公告)号：US20090216929A1
公开(公告)日：2009-08-27
申请号：US12037808
申请日：2008-02-26
IPC分类号： G06F13/24
CPC分类号： G06F9/4812
摘要： A system, method and computer program product for providing a programmable quiesce filtering register. The method includes receiving a quiesce interruption request at the processor. The processor is executing in a mode. A filtering zone associated with the mode is identified. It is determined if the quiesce interruption request can be filtered by the processor. The determining is responsive to the filtering zone and to contents of a programmable filtering register for indicating exceptions to filtering performed by the receiving processor. The quiesce interruption request is filtered in response to determining that the request can be filtered.
摘要翻译： 一种用于提供可编程静态滤波寄存器的系统，方法和计算机程序产品。 该方法包括在处理器处接收静止中断请求。 处理器正在以一种模式执行。 识别与该模式相关联的过滤区域。 确定处理器是否可以过滤停顿中断请求。 该确定响应于过滤区域和可编程过滤寄存器的内容，用于指示接收处理器执行的过滤异常。 响应于确定可以对请求进行过滤，过滤掉静默中断请求。
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公开(公告)号：US20070055911A1
公开(公告)日：2007-03-08
申请号：US11460365
申请日：2006-07-27
申请人： Harald Boehm , Erwin Pfeffer , Joerg Walter
发明人： Harald Boehm , Erwin Pfeffer , Joerg Walter
IPC分类号： G06F11/00
CPC分类号： G06F11/261
摘要： The present invention relates to an automated method and system for transforming a hardware test-case within a system level into at least one unit test-case for a functional unit within a unit level, wherein the functional unit is a component of said hardware. The method comprises the steps of emulating a model of the hardware in the system level, applying the hardware test-case for the system level, recognizing and selecting an information relevant for the functional unit, transforming the information into commands for the functional unit and outputting the unit test-case for the functional unit.
摘要翻译： 本发明涉及一种自动化方法和系统，用于将系统级内的硬件测试用例变换为单元级别内的功能单元的至少一个单元测试用例，其中所述功能单元是所述硬件的组件。 该方法包括以下步骤：仿真系统级的硬件模型，应用系统级的硬件测试用例，识别和选择与功能单元相关的信息，将信息转换为功能单元的命令，并输出 功能单元的单元测试用例。
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公开(公告)号：US06834359B2
公开(公告)日：2004-12-21
申请号：US09960154
申请日：2001-09-21
申请人： Harald Boehm , Joachim von Buttlar , Axel Horsch , Joerg Kayser , Stefan Koerner , Martin Kuenzel
发明人： Harald Boehm , Joachim von Buttlar , Axel Horsch , Joerg Kayser , Stefan Koerner , Martin Kuenzel
IPC分类号： G06F1100
CPC分类号： G06F11/261
摘要： A method for verifying the correctness of the functional behavior of a processor cooperating with software is provided. Furthermore, the method allows verification of a CPU having at least a part of its instruction set implemented with microcode. First, the microcode is independently tested by using a functional emulator performing in the same way as the processor hardware according to the processor's functional specification. Then, the microcode is tested by using a hardware emulator behaving in the same way as the processor hardware according to the design of the processor's logic gates. Finally, the microcode is tested against the actual processor hardware. This method allows the functionality of a newly designed CPU to be checked in a simulation, even before actual system integration. Advantageously, many problems in this area, relating to the interaction of the microcode and the processor hardware can be found before the actual processor hardware is manufactured. Furthermore, the ongoing verification of the newly designed CPU using the method according to the present invention allows detection of problems with the processor hardware at a relatively early stage.
摘要翻译： 提供了一种用于验证与软件协作的处理器的功能行为的正确性的方法。 此外，该方法允许用微码验证具有其指令集的至少一部分的CPU。 首先，通过使用根据处理器的功能规范以与处理器硬件相同的方式执行的功能仿真器来独立测试微代码。 然后，根据处理器逻辑门的设计，通过使用硬件仿真器以与处理器硬件相同的方式进行微代码测试。 最后，微代码是针对实际的处理器硬件进行测试的。 该方法允许在仿真中检查新设计的CPU的功能，甚至在实际系统集成之前。 有利地，可以在制造实际的处理器硬件之前找到涉及微代码和处理器硬件的交互的该领域中的许多问题。 此外，使用根据本发明的方法的新设计的CPU的持续验证允许在较早的阶段检测处理器硬件的问题。
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