公开(公告)号：US09071271B1

公开(公告)日：2015-06-30

申请号：US14189947

申请日：2014-02-25

Applicant: Lockheed Martin Corporation

Inventor： Nathan E. Low ,  Shawn Walters

IPC: H03M1/66

CPC classification number: H03M1/66 ,  H03M1/0658 ,  H03M1/1215 ,  H03M1/662

Abstract: A digital radio frequency memory (DRFM) comprises a plurality of time interleaved analog to digital converters (ADCs) in cooperation with a plurality of time interleaved digital to analog converters (DACs) to provide an effective sampling rate which may be greater than the clock rate of the system. A higher sampling rate at the ADC increases instantaneous bandwidth, while a higher sampling rate at the DAC improves spectral purity. The ADCs and DACs are time interleaved by supplying a clock signal to each ADC/DAC which is skewed with respect to the previous and subsequent skewed signal. In order to process the higher effective sampling rate, a pre-computation of DAC values for each high rate sample is performed by an SDAC algorithm that pipelines the calculations of the processed sample values provided to the DAC. A DAC bias correction is provided to adjust for drift in the DACs.

Abstract translation: 数字射频存储器（DRFM）包括与多个时间交织的数模转换器（DAC）协作的多个时间交错模数转换器（ADC），以提供可能大于时钟速率的有效采样速率 的系统。 ADC采样率越高，瞬时带宽越高，DAC采样率越高，光谱纯度越高。 通过向每个ADC / DAC提供时钟信号来对ADC和DAC进行时间交织，ADC / DAC相对于前一个和后续的偏斜信号是偏斜的。 为了处理更高的有效采样率，通过SDAC算法执行每个高速率采样的DAC值的预计算，SDAC算法将提供给DAC的处理样本值的计算流水线。 提供DAC偏置校正来调整DAC中的漂移。