公开(公告)号：US07656226B2

公开(公告)日：2010-02-02

申请号：US11396393

申请日：2006-03-31

Applicant: Luke A Johnson ,  Yueming He

Inventor： Luke A Johnson ,  Yueming He

IPC: H03F1/02

CPC classification number: H03H19/004

Abstract: An embodiment may be described as a switched capacitor analog equalizer circuit with offset voltage cancellation, where an embodiment comprises an amplifier in which a feedback path from its output port to one of its input ports is provided during a reset phase, and where the amplifier's input port connected to the feedback path is also connected to one terminal of an offset-correction capacitor and one terminal of a sampling capacitor. The other terminal of the offset-correction capacitor is connected to a switch and the other terminal of the sampling capacitor is connected to an input port to receive a signal. During the reset phase, the switch is open, and during a sampling phase, the switch is closed so that the offset-correction capacitor and the sampling capacitor are connected in parallel. Other embodiments are described and claimed.

Abstract translation: 实施例可以被描述为具有偏移电压消除的开关电容器模拟均衡器电路，其中实施例包括放大器，其中在复位阶段期间提供从其输出端口到其输入端口之一的反馈路径，并且其中放大器的输入 连接到反馈路径的端口也连接到偏移校正电容器的一个端子和采样电容器的一个端子。 偏移校正电容器的另一个端子连接到开关，并且采样电容器的另一个端子连接到输入端口以接收信号。 在复位阶段，开关断开，在采样阶段，开关闭合，使得偏置校正电容器和采样电容并联。 描述和要求保护其他实施例。