Switched capacitor equalizer with offset voltage cancelling
    1.
    发明授权
    Switched capacitor equalizer with offset voltage cancelling 失效
    开关电容均衡器,具有失调电压消除

    公开(公告)号:US07656226B2

    公开(公告)日:2010-02-02

    申请号:US11396393

    申请日:2006-03-31

    CPC classification number: H03H19/004

    Abstract: An embodiment may be described as a switched capacitor analog equalizer circuit with offset voltage cancellation, where an embodiment comprises an amplifier in which a feedback path from its output port to one of its input ports is provided during a reset phase, and where the amplifier's input port connected to the feedback path is also connected to one terminal of an offset-correction capacitor and one terminal of a sampling capacitor. The other terminal of the offset-correction capacitor is connected to a switch and the other terminal of the sampling capacitor is connected to an input port to receive a signal. During the reset phase, the switch is open, and during a sampling phase, the switch is closed so that the offset-correction capacitor and the sampling capacitor are connected in parallel. Other embodiments are described and claimed.

    Abstract translation: 实施例可以被描述为具有偏移电压消除的开关电容器模拟均衡器电路,其中实施例包括放大器,其中在复位阶段期间提供从其输出端口到其输入端口之一的反馈路径,并且其中放大器的输入 连接到反馈路径的端口也连接到偏移校正电容器的一个端子和采样电容器的一个端子。 偏移校正电容器的另一个端子连接到开关,并且采样电容器的另一个端子连接到输入端口以接收信号。 在复位阶段,开关断开,在采样阶段,开关闭合,使得偏置校正电容器和采样电容并联。 描述和要求保护其他实施例。

    Analog voltage recovery circuit
    2.
    发明授权
    Analog voltage recovery circuit 失效
    模拟电压恢复电路

    公开(公告)号:US07649388B2

    公开(公告)日:2010-01-19

    申请号:US11396067

    申请日:2006-03-31

    CPC classification number: H03K17/24

    Abstract: In an embodiment, an analog voltage recovery circuit comprising a plurality of capacitors having first terminals connected to a node having the analog voltage, and comprising a state machine, where during an operating mode the second terminals of the plurality of capacitors are coupled to a first rail, and where during a digitization mode the state machine couples the second terminals of a set of the plurality of capacitors to a second rail so that the analog voltage is closer to the second rail voltage than during the beginning of the digitization mode. In an embodiment, the analog voltage recovery circuit brings the node voltage to the second rail voltage at the end of the digitization mode, and then floats the node and couples the second terminals of the plurality of capacitors to the first rail to approximately restore the analog voltage. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中,模拟电压恢复电路包括具有连接到具有模拟电压的节点的第一端子的多个电容器,并且包括状态机,其中在操作模式期间,多个电容器的第二端子耦合到第一 轨道,并且在数字化模式期间,状态机将多组电容器的一组的第二端子耦合到第二轨道,使得模拟电压比数字化模式开始时更接近第二轨道电压。 在一个实施例中,模拟电压恢复电路在数字化模式结束时使节点电压达到第二轨电压,然后浮动节点并将多个电容器的第二端耦合到第一轨,以近似地恢复模拟 电压。 描述和要求保护其他实施例。

    Compact voltage regulator with high supply noise rejection
    3.
    发明授权
    Compact voltage regulator with high supply noise rejection 有权
    紧凑型稳压器,具有高电源噪声抑制能力

    公开(公告)号:US6144195A

    公开(公告)日:2000-11-07

    申请号:US378626

    申请日:1999-08-20

    CPC classification number: G05F1/467

    Abstract: An embodiment of the invention is directed to a voltage regulator that provides a conditioned reference voltage with high supply noise rejection. A reference circuit provides an input reference voltage. An operational amplifier (opamp) has a first opamp input coupled to the reference circuit, a second opamp input, and an opamp output to provide the conditioned reference voltage based on the input reference voltage. A differential MOS amplifier has a first input coupled to the opamp output and an output coupled to the second opamp input. The reference voltage is conditioned in accordance with the size of transistors in the differential amplifier. The voltage regulator may be used in different types of analog-to-digital converters, including those built for use with camera chips.

    Abstract translation: 本发明的实施例涉及一种提供具有高电源噪声抑制的调节参考电压的电压调节器。 参考电路提供输入参考电压。 运算放大器(运算放大器)具有耦合到参考电路的第一运算放大器输入端,第二运算放大器输入端和运算放大器输出端,用于基于输入参考电压提供经调节的参考电压。 差分MOS放大器具有耦合到运算放大器输出的第一输入和耦合到第二运算放大器输入的输出。 参考电压根据差分放大器中晶体管的尺寸进行调节。 电压调节器可以用于不同类型的模拟 - 数字转换器,包括用于与相机芯片一起使用的转换器。

    Method for voltage regulation with supply noise rejection
    5.
    发明授权
    Method for voltage regulation with supply noise rejection 有权
    电源噪声抑制电压调节方法

    公开(公告)号:US06232757B1

    公开(公告)日:2001-05-15

    申请号:US09635296

    申请日:2000-08-10

    CPC classification number: G05F1/467

    Abstract: An embodiment of the invention is directed to a voltage regulator that provides a conditioned reference voltage with high supply noise rejection. A reference circuit provides an input reference voltage. An operational amplifier (opamp) has a first opamp input coupled to the reference circuit, a second opamp input, and an opamp output to provide the conditioned reference voltage based on the input reference voltage. A differential MOS amplifier has a first input coupled to the opamp output and an output coupled to the second opamp input. The reference voltage is conditioned in accordance with the size of transistors in the differential amplifier. The voltage regulator may be used in different types of analog-to-digital converters, including those built for use with camera chips.

    Abstract translation: 本发明的实施例涉及一种提供具有高电源噪声抑制的调节参考电压的电压调节器。 参考电路提供输入参考电压。 运算放大器(运算放大器)具有耦合到参考电路的第一运算放大器输入端,第二运算放大器输入端和运算放大器输出端,用于基于输入参考电压提供经调节的参考电压。 差分MOS放大器具有耦合到运算放大器输出的第一输入和耦合到第二运算放大器输入的输出。 参考电压根据差分放大器中晶体管的尺寸进行调节。 电压调节器可以用于不同类型的模拟 - 数字转换器,包括用于与相机芯片一起使用的转换器。

    Method and apparatus to perform an analog to digital conversion
    6.
    发明授权
    Method and apparatus to perform an analog to digital conversion 失效
    执行模数转换的方法和装置

    公开(公告)号:US06545627B1

    公开(公告)日:2003-04-08

    申请号:US10033954

    申请日:2001-12-19

    CPC classification number: H03M1/403

    Abstract: Briefly, in accordance with an embodiment of the invention, a method and circuit to perform an analog-to-digital conversion is provided. The method may include generating and storing a combined charge which is generated by combining an input charge and a reference charge.

    Abstract translation: 简而言之,根据本发明的实施例,提供了一种执行模数转换的方法和电路。 该方法可以包括生成和存储通过组合输入电荷和参考电荷而产生的组合电荷。

    High accuracy comparator
    7.
    发明授权
    High accuracy comparator 有权
    高精度比较器

    公开(公告)号:US06288666B1

    公开(公告)日:2001-09-11

    申请号:US09436073

    申请日:1999-11-08

    CPC classification number: H03K5/2481 H03K5/249

    Abstract: An embodiment of the invention is directed to a metal oxide semiconductor field effect transistor (MOSFET) comparator, which includes a differential amplifier having first and second inputs and first and second outputs. A first offset storage device is connected to the first input at one end and receives a first input signal of the comparator at another end. A second offset storage device is connected to the second input at one end and receives the first input signal during an autozero time interval and a second input signal of the comparator thereafter. During the autozero time interval, offset voltages are stored. Thereafter, the offsets are cancelled when the input signals are applied to their respective storage device. In a particular embodiment of the invention, the amplifier features a dual purpose load that causes the amplifier to first preamplify and then regeneratively drives the outputs.

    Abstract translation: 本发明的实施例涉及一种金属氧化物半导体场效应晶体管(MOSFET)比较器,其包括具有第一和第二输入以及第一和第二输出的差分放大器。 第一偏移存储装置在一端连接到第一输入端,并在另一端接收比较器的第一输入信号。 第二偏移存储装置在一端连接到第二输入端,并且在自动零时间间隔期间接收第一输入信号,然后在比较器之后接收比较器的第二输入信号。 在自动调零时间间隔内,存储偏移电压。 此后,当输入信号被施加到它们各自的存储装置时,抵消偏移。 在本发明的特定实施例中,放大器具有双用途负载,其使得放大器首先对其进行预放大,然后再生驱动输出。

    Charge pump avoiding gain degradation due to the body effect
    8.
    发明授权
    Charge pump avoiding gain degradation due to the body effect 失效
    电荷泵避免由于身体效应而导致的增益降低

    公开(公告)号:US06232826B1

    公开(公告)日:2001-05-15

    申请号:US09005560

    申请日:1998-01-12

    CPC classification number: H02M3/073 H02M2003/078

    Abstract: A Charge Pump Avoiding Gain Degradation Due to the Body Effect. A charge pump having a first input and a first output, a stage of the charge pump including a first capacitor having a first node and a second node, the second node coupled to receive a first signal; a first p-type transistor having a first gate, a first source, and a first drain, the first gate being coupled to the first node and the first drain, the first source being coupled to the first input; a second capacitor having a third node and a fourth node, the fourth node coupled to receive a second signal; and a second p-type transistor having a second gate, a second source, and a second drain, the second gate being coupled to the third node and the second drain, the second source being coupled to the first drain, the second drain being coupled to the first output.

    Abstract translation: 电荷泵避免由于身体效应而降低增益。 一种具有第一输入和第一输出的电荷泵,所述电荷泵的级包括具有第一节点和第二节点的第一电容器,所述第二节点被耦合以接收第一信号; 具有第一栅极,第一源极和第一漏极的第一p型晶体管,所述第一栅极耦合到所述第一节点和所述第一漏极,所述第一源耦合到所述第一输入端; 具有第三节点和第四节点的第二电容器,所述第四节点被耦合以接收第二信号; 以及第二p型晶体管,其具有第二栅极,第二源极和第二漏极,所述第二栅极耦合到所述第三节点和所述第二漏极,所述第二源极耦合到所述第一漏极,所述第二漏极耦合 到第一个输出。

    Squelch detector
    9.
    发明授权
    Squelch detector 失效
    静噪探测器

    公开(公告)号:US07653367B2

    公开(公告)日:2010-01-26

    申请号:US11394937

    申请日:2006-03-30

    CPC classification number: H03G3/341

    Abstract: A squelch detector that differentially detects a presence of a communication signal on a communication channel. The squelch detector being coupled to outputs of a differential offset bias amplifier to receive differential offset biased signals and generate a differential direct current signal.

    Abstract translation: 一种在通信信道上差分地检测通信信号的存在的静噪检测器。 静噪检测器耦合到差分偏移偏置放大器的输出端,以接收差分偏移偏置信号并产生差分直流信号。

    Analog voltage recovery circuit
    10.
    发明申请
    Analog voltage recovery circuit 失效
    模拟电压恢复电路

    公开(公告)号:US20070229113A1

    公开(公告)日:2007-10-04

    申请号:US11396067

    申请日:2006-03-31

    CPC classification number: H03K17/24

    Abstract: In an embodiment, an analog voltage recovery circuit comprising a plurality of capacitors having first terminals connected to a node having the analog voltage, and comprising a state machine, where during an operating mode the second terminals of the plurality of capacitors are coupled to a first rail, and where during a digitization mode the state machine couples the second terminals of a set of the plurality of capacitors to a second rail so that the analog voltage is closer to the second rail voltage than during the beginning of the digitization mode. In an embodiment, the analog voltage recovery circuit brings the node voltage to the second rail voltage at the end of the digitization mode, and then floats the node and couples the second terminals of the plurality of capacitors to the first rail to approximately restore the analog voltage. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中,模拟电压恢复电路包括具有连接到具有模拟电压的节点的第一端子的多个电容器,并且包括状态机,其中在操作模式期间,多个电容器的第二端子耦合到第一 轨道,并且在数字化模式期间,状态机将多组电容器的一组的第二端子耦合到第二轨道,使得模拟电压比数字化模式开始时更接近第二轨道电压。 在一个实施例中,模拟电压恢复电路在数字化模式结束时使节点电压达到第二轨电压,然后浮动节点并将多个电容器的第二端耦合到第一轨,以近似地恢复模拟 电压。 描述和要求保护其他实施例。

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