公开(公告)号：US08253440B2

公开(公告)日：2012-08-28

申请号：US12565545

申请日：2009-09-23

Applicant: John Maddux ,  Luke A. Johnson ,  Ronald W. Swartz ,  Donald Rush ,  Meetul Goyal ,  Rajashri Doddamani

Inventor： John Maddux ,  Luke A. Johnson ,  Ronald W. Swartz ,  Donald Rush ,  Meetul Goyal ,  Rajashri Doddamani

IPC: H03K19/003

CPC classification number: H03K19/018521 ,  G11C29/02 ,  G11C29/025 ,  G11C29/028 ,  G11C29/50008 ,  G11C2207/2254 ,  H03K19/018585

Abstract: Methods and systems to calibrate an on-die resistor relative to an operating voltage of an on-die push-pull driver, and to calibrate the push-pull driver relative to the on-die resistor and relative to operating voltages of the push-pull driver. The calibrated on-die resistor may be used to calibrate receive terminations, a differential transmit termination, and a simulated far-end differential receive termination. The calibrated differential transmit termination and simulated far-end differential receive termination may be coupled in parallel to calibrate current drivers. Calibration of the current drivers may include calibrating voltage swing, and may include a first phase that simultaneously adjusts compensation to the current drivers, and a second phase that individually adjusts the compensation to the current drivers.

Abstract translation: 校准片上电阻器相对于片上推挽式驱动器的工作电压的校准方法和系统，以及相对于片上电阻校准推挽驱动器并相对于推挽的工作电压 司机。 校准的片上电阻可用于校准接收终端，差分发射终端和模拟远端差分接收终端。 校准的差分发送终端和模拟远端差分接收终端可以并联耦合以校准当前驱动器。 电流驱动器的校准可以包括校准电压摆幅，并且可以包括同时调整对当前驱动器的补偿的第一阶段以及分别调整对当前驱动器的补偿的第二阶段。

公开(公告)号：US07302246B2

公开(公告)日：2007-11-27

申请号：US10329187

申请日：2002-12-23

Applicant: James Tseng ,  Waleed Khalil ,  Bobby Nikjou ,  Luke A. Johnson

Inventor： James Tseng ,  Waleed Khalil ,  Bobby Nikjou ,  Luke A. Johnson

IPC: H04B1/06

CPC classification number: H03F3/45973 ,  H03F2203/45591

Abstract: Briefly, in accordance with one embodiment of the invention, a calibration circuit may detect a difference between first and second outputs of a differential output programmable gain amplifier to determine a dc offset at the differential output. In the event an offset is detected, a differential gain of the programmable gain amplifier may be adjusted until the offset is adjusted, or eliminated, to an acceptable predetermined value.

Abstract translation: 简而言之，根据本发明的一个实施例，校准电路可以检测差分输出可编程增益放大器的第一和第二输出之间的差异，以确定差分输出处的直流偏移。 在检测到偏移的情况下，可以调节可编程增益放大器的差分增益，直到偏移被调整或消除为可接受的预定值。

公开(公告)号：US07280456B2

公开(公告)日：2007-10-09

申请号：US10628526

申请日：2003-07-28

Applicant: Michael A. Brown ,  Luke A. Johnson

Inventor： Michael A. Brown ,  Luke A. Johnson

IPC: G11B7/00

CPC classification number: G11C29/50008 ,  G11B9/04 ,  G11C11/16

Abstract: A method and an apparatus for detecting a number of variation in resistance within a material stack in response to a scanning and injection of a non-contacting electron stream into a material stack, the material stack having a first conductive contact layer, a variable resistive layer, a fixed resistive layer, and a second conductive contact layer, and the variations in resistance within the material stack being based on one of a plurality of resistive states of the variable resistive layer. The method also includes generating two magnetic fields within a transformer, the transformer being operatively coupled to the first and second conductive contact layers and generating a differential output signal within the transformer based on the two magnetic fields, the differential output signal being associated with one of the plurality of resistive states.

Abstract translation: 一种用于响应于将非接触电子流扫描并注入到材料堆中而检测材料堆内的电阻变化的数量的方法和装置，所述材料堆具有第一导电接触层，可变电阻层 ，固定电阻层和第二导电接触层，并且材料堆叠内的电阻变化基于可变电阻层的多个电阻状态之一。 该方法还包括在变压器内产生两个磁场，变压器可操作地耦合到第一和第二导电接触层，并且基于两个磁场在变压器内产生差分输出信号，该差分输出信号与 多个电阻状态。

公开(公告)号：US06498824B1

公开(公告)日：2002-12-24

申请号：US09406326

申请日：1999-09-27

Applicant: Luke A. Johnson

Inventor： Luke A. Johnson

IPC: H03D324

CPC classification number: H03D13/004 ,  H04L7/033

Abstract: The invention relates to a phase detector. The phase detector includes data sampling cells to sample a stream of serial data and generate primary data samples and also includes edge data sampling cells to sample the stream of serial data and generate edge data samples. The phase detector further includes phase detecting cells to generate phase control signals. Each phase detecting cell includes a first circuit to receive data and sampled edge data and to generate a first signal and a second signal. The first signal from a phase detecting cell is a delayed sampled edge data. The second signal from that phase detecting cell will be a delayed sampled edge data before data is sampled by the data sampling cell. Once data is sampled by the data sampling cell, the second signal from that phase detecting cell will be a secondary data sample. Each phase detecting cell also includes a comparator circuit to receive the first signal and second signal and to generate a phase control signal therefrom.

Abstract translation: 本发明涉及一种相位检测器。 相位检测器包括数据采样单元以对串行数据流进行采样并生成主数据采样，并且还包括边缘数据采样单元以对串行数据流进行采样并生成边缘数据采样。 相位检测器还包括产生相位控制信号的相位检测单元。 每个相位检测单元包括用于接收数据和采样的边缘数据并产生第一信号和第二信号的第一电路。 来自相位检测单元的第一信号是延迟采样的边缘数据。 来自该相位检测单元的第二信号将是在数据被数据采样单元采样之前的延迟的采样边缘数据。 一旦数据被数据采样单元采样，来自该相位检测单元的第二信号将是二次数据采样。 每个相位检测单元还包括一个比较器电路，用于接收第一信号和第二信号，并产生相位控制信号。

公开(公告)号：US06255873B1

公开(公告)日：2001-07-03

申请号：US09665339

申请日：2000-09-19

Applicant: Luke A. Johnson ,  Timothy E. Fiscus

Inventor： Luke A. Johnson ,  Timothy E. Fiscus

IPC: H03L706

CPC classification number: H03L7/0896

Abstract: An embodiment of the invention is directed to a circuit including first and second filter nodes for being connected to a filter and first and second bypass nodes corresponding to the first and second filter nodes, respectively. A charge transfer circuit having at least one charge transfer node is to be alternatively coupled to one of the filter nodes and a corresponding one of the bypass nodes for transferring charge to control a differential voltage of the filter nodes. First and second amplifiers are to buffer the voltages on the first and second filter nodes at first and second outputs which are coupled to the first and second bypass nodes, respectively. The output voltage of each amplifier can be adjusted according to a difference between a control voltage and a common mode voltage of the first and second nodes.

Abstract translation: 本发明的实施例涉及一种电路，其包括分别连接到滤波器的第一和第二滤波器节点以及分别对应于第一和第二滤波器节点的第一和第二旁路节点。 具有至少一个电荷转移节点的电荷转移电路可替代地耦合到滤波器节点中的一个以及用于传送电荷以控制滤波器节点的差分电压的旁路节点中的相应一个。 第一和第二放大器分别在第一和第二输出端缓冲第一和第二滤波器节点上的电压，分别耦合到第一和第二旁路节点。 可以根据第一和第二节点的控制电压和共模电压之差来调节每个放大器的输出电压。

公开(公告)号：US07330993B2

公开(公告)日：2008-02-12

申请号：US10675875

申请日：2003-09-29

Applicant: Mahesh J. Deshmane ,  Mark A. Beiley ,  Luke A. Johnson

Inventor： Mahesh J. Deshmane ,  Mark A. Beiley ,  Luke A. Johnson

IPC: G06F1/04 ,  G06F1/24 ,  G06F11/00

CPC classification number: G06F13/4072

Abstract: According to one embodiment a computer system is disclosed. The computer system includes a bus and a chipset coupled to the bus. The chipset detects the slew rate of a signal transmitted over the bus by the chipset. In addition the chipset adjusts the slew rate based upon the state of the signal.

Abstract translation: 根据一个实施例，公开了一种计算机系统。 计算机系统包括总线和耦合到总线的芯片组。 芯片组通过芯片组检测总线上传输的信号的转换速率。 此外，芯片组根据信号的状态调整转换速率。

公开(公告)号：US06417675B1

公开(公告)日：2002-07-09

申请号：US09652031

申请日：2000-08-31

Applicant: Luke A. Johnson

Inventor： Luke A. Johnson

IPC: G01R2728

CPC classification number: H03H7/40

Abstract: The present invention is directed to receiver impedance calibration arrangements in full duplex communication systems.

Abstract translation: 本发明涉及全双工通信系统中的接收机阻抗校准装置。

公开(公告)号：US06310514B1

公开(公告)日：2001-10-30

申请号：US09464974

申请日：1999-12-16

Applicant: Luke A. Johnson

Inventor： Luke A. Johnson

IPC: G01R1900

CPC classification number: H03F3/45986 ,  H03M1/1009 ,  H03M1/442

Abstract: An amplifier includes a first circuit and a second circuit. The first circuit, in a first mode of the amplifier, amplifies an input signal to produce a first output signal. The second circuit is coupled to the first circuit to cause the first circuit to, in a second mode of the amplifier, provide a second output signal that is indicative of a degree of calibration of the amplifier.

Abstract translation: 放大器包括第一电路和第二电路。 在放大器的第一模式中的第一电路放大输入信号以产生第一输出信号。 第二电路耦合到第一电路，以使第一电路在放大器的第二模式中提供指示放大器校准程度的第二输出信号。

公开(公告)号：US06194967B1

公开(公告)日：2001-02-27

申请号：US09099081

申请日：1998-06-17

Applicant: Luke A. Johnson ,  Rizwan Ahmed

Inventor： Luke A. Johnson ,  Rizwan Ahmed

IPC: H03F304

CPC classification number: H03F3/345 ,  G05F3/262

Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit includes an operational amplifier coupled in a circuit configuration. The circuit configuration includes two transistors coupled to the operational amplifier so that the corresponding voltages at the terminals or ports of the transistors are substantially identical. Briefly, in accordance with one more embodiment of the invention, an integrated circuit includes an operational amplifier coupled in a circuit configuration. The circuit configuration includes two circuit components coupled to the operational amplifier so that the corresponding voltages at the terminals or ports of the circuit components are substantially identical. The circuit components include any circuit components capable of implementing a transconductance.

Abstract translation: 简而言之，根据本发明的一个实施例，集成电路包括以电路配置耦合的运算放大器。 电路配置包括耦合到运算放大器的两个晶体管，使得晶体管的端子或端口处的对应电压基本相同。 简而言之，根据本发明的另一实施例，集成电路包括以电路配置耦合的运算放大器。 电路配置包括耦合到运算放大器的两个电路部件，使得电路部件的端子或端口处的对应电压基本相同。 电路部件包括能够实现跨导的任何电路部件。

公开(公告)号：US06184732B2

公开(公告)日：2001-02-06

申请号：US09370622

申请日：1999-08-06

Applicant: Luke A. Johnson ,  Timothy E. Fiscus

Inventor： Luke A. Johnson ,  Timothy E. Fiscus

IPC: H03L706

CPC classification number: H03L7/0896

Abstract: An embodiment of the invention is directed to a circuit including first and second filter nodes for being connected to a filter and first and second bypass nodes corresponding to the first and second filter nodes, respectively. A charge transfer circuit having at least one charge transfer node is to be alternatively coupled to one of the filter nodes and a corresponding one of the bypass nodes for transferring charge to control a differential voltage of the filter nodes. First and second amplifiers are to buffer the voltages on the first and second filter nodes at first and second outputs which are coupled to the first and second bypass nodes, respectively. The output voltage of each amplifier can be adjusted according to a difference between a control voltage and a common mode voltage of the first and second nodes.