公开(公告)号：US09425209B1

公开(公告)日：2016-08-23

申请号：US14846262

申请日：2015-09-04

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Chin-Cheng Yang ,  Lo-Yuen Lin ,  Yu-Wei Jiang

IPC: H01L29/76 ,  H01L27/115 ,  H01L29/788 ,  H01L23/528 ,  H01L29/792

CPC classification number: H01L27/11582 ,  H01L23/528 ,  H01L27/11519 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11575

Abstract: An integrated circuit includes blocks and global lines overlying the blocks. The blocks include a plurality of levels including two dimensional arrays of memory cells having horizontal lines and being intersected by vertical lines coupled to corresponding memory cells. Levels include contact pads communicating with horizontal lines for a given block. The global lines include connectors. Connectors coupled to given global lines are coupled to landing areas on corresponding contact pads of the blocks. The blocks include first and second blocks disposed so that a first set of the contact pads associated with the first block are next to a second set of contact pads associated with the second block. The landing areas of the contact pads of the first and second blocks are mirror image surfaces of one another. The horizontal lines can be bit lines and the vertical lines can be word lines.

Abstract translation: 集成电路包括覆盖块的块和全局线。 这些块包括多个级，包括具有水平线的存储器单元的二维阵列，并且与由相应的存储器单元耦合的垂直线相交。 电平包括与给定块的水平线通信的接触焊盘。 全球线路包括连接器。 耦合到给定的全局线的连接器耦合到块的相应接触焊盘上的着陆区域。 这些块包括第一和第二块，其被布置成使得与第一块相关联的第一组接触垫相邻于与第二块相关联的第二组接触垫。 第一和第二块的接触垫的着陆区域是彼此的镜像表面。 水平线可以是位线，垂直线可以是字线。