公开(公告)号：US20170102977A1

公开(公告)日：2017-04-13

申请号：US15389238

申请日：2016-12-22

申请人： MACRONIX INTERNATIONAL CO., LTD.

发明人： YIH-SHAN YANG ,  SHOU-NAN HUNG ,  CHUN-HSIUNG HUNG ,  YAO-JEN KUO ,  MENG-FAN CHANG

IPC分类号： G06F11/07 ,  G11C16/34 ,  G11C16/08 ,  G06F3/06

CPC分类号： G06F11/076 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0679 ,  G06F11/0727 ,  G06F11/0787 ,  G06F11/08 ,  G11C16/08 ,  G11C16/26 ,  G11C16/3445 ,  G11C16/3459 ,  G11C29/00 ,  G11C29/022 ,  G11C29/42 ,  G11C29/44 ,  G11C2216/14

摘要： Counting status circuits are electrically coupled to corresponding status elements. The status elements selectably store a bit status of a bit line coupled to a memory array. The bit status can indicate one of at least pass and fail. The counting status circuits are electrically coupled to each other in a sequential order. Control logic causes processing of the counting status circuits in the sequential order to determine a total of the memory elements that store the bit status. The total number of memory elements that store the bit status indicate the number of error bits or non-error bits, which can help determine whether there are too many errors to be fixed by error correction codes.