公开(公告)号：US08772106B2

公开(公告)日：2014-07-08

申请号：US13937465

申请日：2013-07-09

Applicant: Macronix International Co., Ltd.

Inventor： Ming-Daou Lee ,  Erh-Kun Lai ,  Kuang-Yeu Hsieh ,  Wei-Chih Chien ,  Chien Hung Yeh

IPC: H01L21/00 ,  H01L21/16 ,  H01L21/8234 ,  H01L21/8244 ,  H01L21/8222

CPC classification number: H01L45/1608 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/72 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/112

Abstract: Memory devices are described along with methods for manufacturing and methods for operating. A memory device as described herein includes a plurality of memory cells located between word lines and bit lines. Memory cells in the plurality of memory cells comprise a diode and a metal-oxide memory element programmable to a plurality of resistance states including a first and a second resistance state, the diode of the memory element arranged in electrical series along a current path between a corresponding word line and a corresponding bit line. The device further includes bias circuitry to apply bias arrangements across the series arrangement of the diode and the memory element of a selected memory cell in the plurality of memory cells.

Abstract translation: 描述存储器件以及用于制造的方法和操作方法。 如本文所述的存储器件包括位于字线和位线之间的多个存储器单元。 多个存储单元中的存储单元包括可编程为包括第一和第二电阻状态的多个电阻状态的二极管和金属氧化物存储元件，存储元件的二极管沿着电流串联布置在 对应的字线和相应的位线。 该装置还包括偏置电路，以跨越二极管的串联装置和多个存储单元中所选存储单元的存储元件施加偏置装置。

公开(公告)号：US20130295719A1

公开(公告)日：2013-11-07

申请号：US13937465

申请日：2013-07-09

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Ming-Daou Lee ,  Erh-Kun Lai ,  Kuang-Yeu Hsieh ,  Wei-Chih Chien ,  Chien Hung Yeh

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/72 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/112

Abstract: Memory devices are described along with methods for manufacturing and methods for operating. A memory device as described herein includes a plurality of memory cells located between word lines and bit lines. Memory cells in the plurality of memory cells comprise a diode and a metal-oxide memory element programmable to a plurality of resistance states including a first and a second resistance state, the diode of the memory element arranged in electrical series along a current path between a corresponding word line and a corresponding bit line. The device further includes bias circuitry to apply bias arrangements across the series arrangement of the diode and the memory element of a selected memory cell in the plurality of memory cells.

Abstract translation: 描述存储器件以及用于制造的方法和操作方法。 如本文所述的存储器件包括位于字线和位线之间的多个存储器单元。 多个存储单元中的存储单元包括可编程为包括第一和第二电阻状态的多个电阻状态的二极管和金属氧化物存储元件，存储元件的二极管沿着电流串联布置在 对应的字线和相应的位线。 该装置还包括偏置电路，以跨越二极管的串联装置和多个存储单元中所选存储单元的存储元件施加偏置装置。