MULTI-GATE TRANSISTOR AND MEMORY DEVICE USING THE SAME

    公开(公告)号:US20210242347A1

    公开(公告)日:2021-08-05

    申请号:US16877518

    申请日:2020-05-19

    Abstract: A multi-gate transistor includes; a doped drain region; a doped source region; a gate group including a first gate and a second gate; a channel, the doped drain region and the doped source region being on respective two sides of the channel; and an interlayer, formed between the channel and the gate group, wherein a first gate voltage and a second gate voltage are applied to the first gate and the second gate of the gate group, respectively, the channel is induced as at least a P sub-channel and at least an N sub-channel and the multi-gate transistor equivalently behaves as a PNPN structure.

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