公开(公告)号：US10290543B1

公开(公告)日：2019-05-14

申请号：US15848986

申请日：2017-12-20

Applicant: MACRONIX International Co., Ltd.

Inventor： Chang-Wen Jian ,  Hsiang-Lu Wu ,  Yu-Min Hung ,  Tzung-Ting Han

IPC: H01L49/02 ,  H01L21/768 ,  H01L21/3213

Abstract: A method for manufacturing semiconductor device is provided. A substrate having a memory region and a capacitance region is provided. A plurality of word line structures are formed on the memory region of the substrate. A capacitance structure is formed on the capacitance region of the substrate. The word line structures and the capacitance structure each include a first dielectric layer on the substrate, a first conductive layer on the first dielectric layer, a second dielectric layer on the first conductive layer, and a second conductive layer on the second dielectric layer. The second conductive layers of the word line structures close to an edge of the memory region and a portion of the second conductive layer of the capacitance structure are removed at the same time to form a trench exposing a portion of the second dielectric layer.