公开(公告)号：US20250107082A1

公开(公告)日：2025-03-27

申请号：US18474615

申请日：2023-09-26

Applicant: MACRONIX International Co., Ltd.

Inventor： Chen-Yu Cheng ,  Chih-Kai Yang ,  Shih-Chin Lee ,  Tzung-Ting Han

IPC: H10B43/27

Abstract: A memory device includes a stack structure, a first stop layer, a dielectric layer, at least one separation wall and a conductive plug. The stacked structure is located over a substrate. The stacked structure has an opening exposing a stepped structure of the stacked structure. The first stop layer covers the stepped structure and at least at least one portion of sidewalls of the opening. The dielectric layer fills the opening and covers the first stop layer. The separation wall extends through the dielectric layer and the first stop layer in the opening. The conductive plug extends through the dielectric layer and the first stop layer, and is electrically connected to the stepped structure. The memory device may be a 3D NAND flash memory with high capacity and high performance.