DEVICE WITH MULTI-CHANNEL BONDING
    1.
    发明公开

    公开(公告)号:US20240356681A1

    公开(公告)日:2024-10-24

    申请号:US18762573

    申请日:2024-07-02

    申请人: MaxLinear, Inc.

    IPC分类号: H04L1/1829 H04L1/1607

    CPC分类号: H04L1/1841 H04L1/1642

    摘要: A system may include primary and secondary integrated circuits. The primary integrated circuit may receive a first subset of data packets associated with a first set of sequence numbers. The secondary integrated circuit may receive a second subset of data packets associated with a second set of sequence numbers. The primary integrated circuit is configured to manage the first set of sequence numbers and the second set of sequence numbers on behalf of the secondary integrated circuit and for the system.

    Device with multi-channel bonding

    公开(公告)号:US12028168B2

    公开(公告)日:2024-07-02

    申请号:US17659281

    申请日:2022-04-14

    申请人: MAXLINEAR, INC.

    IPC分类号: H04L1/1829 H04L1/1607

    CPC分类号: H04L1/1841 H04L1/1642

    摘要: A system may include primary and secondary integrated circuits. The primary integrated circuit may receive a first subset of data packets associated with a first set of sequence numbers. The secondary integrated circuit may receive a second subset of data packets associated with a second set of sequence numbers. The primary integrated circuit is configured to manage the first set of sequence numbers and the second set of sequence numbers on behalf of the secondary integrated circuit and for the system.

    DEVICE WITH MULTI-CHANNEL BONDING

    公开(公告)号:US20220337354A1

    公开(公告)日:2022-10-20

    申请号:US17659281

    申请日:2022-04-14

    申请人: MAXLINEAR, INC.

    IPC分类号: H04L1/18 H04L1/16

    摘要: A system may include primary and secondary integrated circuits. The primary integrated circuit may receive a first subset of data packets associated with a first set of sequence numbers. The secondary integrated circuit may receive a second subset of data packets associated with a second set of sequence numbers. The primary integrated circuit is configured to manage the first set of sequence numbers and the second set of sequence numbers on behalf of the secondary integrated circuit and for the system.