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公开(公告)号：US20210012110A1
公开(公告)日：2021-01-14
申请号：US16789376
申请日：2020-02-12
Applicant: MEDIATEK INC.
Inventor： Chih-Wei Chen , Pei-Kuei Tsung , Shao-Yi Wang , Hung-Jen Chen , Kuan-Yu Chen , Cheng-Lung Jen
Abstract: An object detection apparatus includes a boundary box decision circuit and a processing circuit. The boundary box decision circuit receives lens configuration information of a lens, and refers to the lens configuration information to determine a bounding box distribution of bounding boxes that are assigned to different detection distances with respect to the lens for detection of a target object. The processing circuit receives a captured image that is derived from an output of an image capture device using the lens, and performs object detection upon the captured image according to the bounding box distribution of the bounding boxes.
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公开(公告)号：US20200327864A1
公开(公告)日：2020-10-15
申请号：US16819153
申请日：2020-03-15
Applicant: MEDIATEK INC.
Inventor： Cheng-Lung Jen , Pei-Kuei Tsung , Chih-Wen Goo , Yu-Cheng Tseng , Yu-Lin Hou , Kuo-Chiang Lo , Chia-Da Lee , Tung-Chien Chen
Abstract: A video processing system includes an input port and a video processing circuit. The input port obtains device information of a display panel. The video processing circuit obtains an input frame and the device information, configures an image enhancement operation according to the device information, generates an output frame by performing the image enhancement operation upon the input frame, and transmits the output frame to the display panel for video playback.
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Patent Agency Ranking
公开(公告)号：US20210287339A1
公开(公告)日：2021-09-16
申请号：US17196957
申请日：2021-03-09
Applicant: MEDIATEK INC.
Inventor： Ming-En Shih , Yu-Cheng Tseng , Kuo-Chen Huang , Pei-Kuei Tsung , Hsin-Min Peng , Ping-Yuan Tsai , Kuo-Chiang Lo , Chun-Hsien Wu , Chih-Wei Chen , Cheng-Lung Jen
Abstract: An image processing apparatus includes a super-resolution (SR) circuit and a resizer circuit. The SR circuit performs an SR operation upon a first image to generate a second image, wherein a resolution of the second image is not lower than a resolution of the first image, and the SR operation is based, at least in part, on one or more artificial intelligence (AI) models. The resizer circuit performs a resize operation upon the second image to generate a third image, wherein a resolution of the third image is not lower than the resolution of the second image, and no AI model is involved in the resize operation.
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公开(公告)号：US20230328202A1
公开(公告)日：2023-10-12
申请号：US18128180
申请日：2023-03-29
Applicant: MEDIATEK INC.
Inventor： Yao-Sheng Wang , Pei-Kuei Tsung , Chia-Ni Lu , Yu-Sheng Lin , Chien-Yu Huang , Chih-Wen Goo , Cheng-Lung Jen
IPC: H04N7/01
CPC classification number: H04N7/014 , H04N7/0127
Abstract: A frame interpolation method for generating a third image frame interpolated between a first image frame and a second image frame includes: performing motion estimation upon a first input image frame and a second input image frame, to obtain a single-directional motion, wherein the first input image frame is derived from the first image frame, and the second input image frame is derived from the second image frame; scaling the single-directional motion according to a time point of the third image frame, to generate a scaled motion; deriving a forward-warped result from a result of performing a forward warping operation and a first inverse operation upon the scaled motion; performing a second inverse operation upon the forward-warped result, to generate an inversed result; and generating the third image frame according to the first image frame, the second image frame, the forward-warped result, and the inversed result.
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公开(公告)号：US12010456B2
公开(公告)日：2024-06-11
申请号：US18128180
申请日：2023-03-29
Applicant: MEDIATEK INC.
Inventor： Yao-Sheng Wang , Pei-Kuei Tsung , Chia-Ni Lu , Yu-Sheng Lin , Chien-Yu Huang , Chih-Wen Goo , Cheng-Lung Jen
IPC: H04N7/01
CPC classification number: H04N7/014 , H04N7/0127
Abstract: A frame interpolation method for generating a third image frame interpolated between a first image frame and a second image frame includes: performing motion estimation upon a first input image frame and a second input image frame, to obtain a single-directional motion, wherein the first input image frame is derived from the first image frame, and the second input image frame is derived from the second image frame; scaling the single-directional motion according to a time point of the third image frame, to generate a scaled motion; deriving a forward-warped result from a result of performing a forward warping operation and a first inverse operation upon the scaled motion; performing a second inverse operation upon the forward-warped result, to generate an inversed result; and generating the third image frame according to the first image frame, the second image frame, the forward-warped result, and the inversed result.
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公开(公告)号：US11983848B2
公开(公告)日：2024-05-14
申请号：US18151104
申请日：2023-01-06
Applicant: MEDIATEK INC.
Inventor： Cheng-Lung Jen , Pei-Kuei Tsung , Chih-Wei Chen , Yao-Sheng Wang , Shih-Che Chen , Yu-Sheng Lin , Chih-Wen Goo , Shih-Chin Lin , Tsung-Shian Huang , Ying-Chieh Chen
CPC classification number: G06T5/002 , G06T3/0093 , G06T3/4053 , G06T5/50 , G06T7/254 , G06T2207/20084 , G06T2207/20224
Abstract: Aspects of the disclosure provide a frame processor for processing frames with aliasing artifacts. For example, the frame processor can include a super-resolution (SR) and anti-aliasing (AA) engine and an attention reference frame generator coupled to the SR and AA engine. The SR and AA engine can be configured to enhance resolution and remove aliasing artifacts of a frame to generate a first high-resolution frame with aliasing artifacts and a second high-resolution frame with aliasing artifacts removed. The attention reference frame generator can be configured to generate an attention reference frame based on the first high-resolution frame and the second high-resolution frame.
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公开(公告)号：US11004232B2
公开(公告)日：2021-05-11
申请号：US16789376
申请日：2020-02-12
Applicant: MEDIATEK INC.
Inventor： Chih-Wei Chen , Pei-Kuei Tsung , Shao-Yi Wang , Hung-Jen Chen , Kuan-Yu Chen , Cheng-Lung Jen
Abstract: An object detection apparatus includes a boundary box decision circuit and a processing circuit. The boundary box decision circuit receives lens configuration information of a lens, and refers to the lens configuration information to determine a bounding box distribution of bounding boxes that are assigned to different detection distances with respect to the lens for detection of a target object. The processing circuit receives a captured image that is derived from an output of an image capture device using the lens, and performs object detection upon the captured image according to the bounding box distribution of the bounding boxes.
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