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公开(公告)号：US11580621B2
公开(公告)日：2023-02-14
申请号：US17113397
申请日：2020-12-07
Applicant: MEDIATEK INC.
Inventor： Jen Cheng Lung , Pei-Kuei Tsung , Chih-Wei Chen , Yao-Sheng Wang , Shih-Che Chen , Yu-Sheng Lin , Chih-Wen Goo , Shih-Chin Lin , Huang Tsung-Shian , Ying-Chieh Chen
Abstract: Aspects of the disclosure provide a device for processing frames with aliasing artifacts. For example, the device can include a motion estimation circuit, a warping circuit coupled to the motion estimation circuit, and a temporal decision circuit coupled to the warping circuit. The motion estimation circuit can estimate a motion value between a current frame and a previous frame. The warping circuit can warp the previous frame based on the motion value such that the warped previous frame is aligned with the current frame and determine whether the current frame and the warped previous frame are consistent. The temporal decision circuit can generate an output frame, the output frame including either the current frame and the warped previous frame when the current frame and the warped previous frame are consistent, or the current frame when the current frame and the warped previous frame are not consistent.
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公开(公告)号：US11321901B2
公开(公告)日：2022-05-03
申请号：US16789870
申请日：2020-02-13
Applicant: MediaTek Inc.
Inventor： Chien-Chih Wang , Ying-Chieh Chen
Abstract: A graphics system includes an effect engine, which executes a predefined set of graphics operations having a higher computational complexity than pipeline operations. The graphics system further includes a graphics pipeline operative to perform the pipeline operations on graphical objects in a frame. The effect engine is operative to execute the predefined set of graphics operations on a subset of the graphical objects in the frame. One or more buffers are operative to receive pixels of the frame for display. The frame includes the graphical objects operated on by the graphics pipeline and the subset of the graphical objects operated on by the effect engine.
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公开(公告)号：US20220222885A1
公开(公告)日：2022-07-14
申请号：US17708965
申请日：2022-03-30
Applicant: MediaTek Inc.
Inventor： Chien-Chih Wang , Ying-Chieh Chen
Abstract: A graphics system includes an effect engine and a graphics pipeline. The graphics pipeline performs pipeline operations on graphical objects in a frame. The graphics pipeline includes at least a fragment shader stage. An application programming interface (API) provides an instruction that specifies a subset of the graphical objects in the frame for the effect engine to execute. When detecting the instruction, the graphics pipeline invokes the effect engine to perform a predefined set of graphics operations on the subset of the graphical objects in the frame. The predefined set of graphics operations has a higher computational complexity than the pipeline operations.
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公开(公告)号：US10121222B2
公开(公告)日：2018-11-06
申请号：US15242478
申请日：2016-08-19
Applicant: MediaTek Inc.
Inventor： Ying-Chieh Chen , I-Hsuan Lu , Shih-Chin Lin
Abstract: A graphics processing unit (GPU) renders graphical objects into a group of pixels and stores the pixels in an on-chip buffer on the same chip as the GPU. Each pixel has an alpha value that indicates transparency of the pixel. The GPU reads the alpha value of each pixel from the on-chip buffer. According to alpha values of the group of pixels, the GPU generates an alpha hint in the system memory for the group of pixels. The alpha hint represents an aggregate of the alpha values of the group of pixels. The GPU then stores the group of pixels into a frame buffer in the system memory.
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公开(公告)号：US11941741B2
公开(公告)日：2024-03-26
申请号：US17708965
申请日：2022-03-30
Applicant: MediaTek Inc.
Inventor： Chien-Chih Wang , Ying-Chieh Chen
CPC classification number: G06T15/005 , G06T1/20 , G06T15/06 , G06T1/60
Abstract: A graphics system includes an effect engine and a graphics pipeline. The graphics pipeline performs pipeline operations on graphical objects in a frame. The graphics pipeline includes at least a fragment shader stage. An application programming interface (API) provides an instruction that specifies a subset of the graphical objects in the frame for the effect engine to execute. When detecting the instruction, the graphics pipeline invokes the effect engine to perform a predefined set of graphics operations on the subset of the graphical objects in the frame. The predefined set of graphics operations has a higher computational complexity than the pipeline operations.
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Patent Agency Ranking
公开(公告)号：US20210256753A1
公开(公告)日：2021-08-19
申请号：US16789870
申请日：2020-02-13
Applicant: MediaTek Inc.
Inventor： Chien-Chih Wang , Ying-Chieh Chen
Abstract: A graphics system includes an effect engine, which executes a predefined set of graphics operations having a higher computational complexity than pipeline operations. The graphics system further includes a graphics pipeline operative to perform the pipeline operations on graphical objects in a frame. The effect engine is operative to execute the predefined set of graphics operations on a subset of the graphical objects in the frame. One or more buffers are operative to receive pixels of the frame for display. The frame includes the graphical objects operated on by the graphics pipeline and the subset of the graphical objects operated on by the effect engine.
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公开(公告)号：US11983848B2
公开(公告)日：2024-05-14
申请号：US18151104
申请日：2023-01-06
Applicant: MEDIATEK INC.
Inventor： Cheng-Lung Jen , Pei-Kuei Tsung , Chih-Wei Chen , Yao-Sheng Wang , Shih-Che Chen , Yu-Sheng Lin , Chih-Wen Goo , Shih-Chin Lin , Tsung-Shian Huang , Ying-Chieh Chen
CPC classification number: G06T5/002 , G06T3/0093 , G06T3/4053 , G06T5/50 , G06T7/254 , G06T2207/20084 , G06T2207/20224
Abstract: Aspects of the disclosure provide a frame processor for processing frames with aliasing artifacts. For example, the frame processor can include a super-resolution (SR) and anti-aliasing (AA) engine and an attention reference frame generator coupled to the SR and AA engine. The SR and AA engine can be configured to enhance resolution and remove aliasing artifacts of a frame to generate a first high-resolution frame with aliasing artifacts and a second high-resolution frame with aliasing artifacts removed. The attention reference frame generator can be configured to generate an attention reference frame based on the first high-resolution frame and the second high-resolution frame.
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公开(公告)号：US20230025347A1
公开(公告)日：2023-01-26
申请号：US17849473
申请日：2022-06-24
Applicant: MediaTek Inc.
Inventor： Jen-Jung Cheng , Shih-Chin Lin , Du-Xiu Li , Ying-Chieh Chen , Kun-Han Huang
Abstract: Disclosed are embodiments of a graphics scene detection technique that provides an adaptive scale factor dependent on an image quality, such that certain images may be downscaled prior to being displayed to preserve system resources without significantly affecting image quality for a user. The inventors recognized and appreciated that certain images may be presented at a lower resolution to a user without being perceived as lower image quality. Some aspects provide a scene detection module that determines a quality score from a graphic command output for an image. Depending on the quality score, the scene detection module may output a quality-aware scale factor that can be applied to reduce pixel resolution of an image before displaying the image to a user. Resultingly, the computing device may be improved by saving system resources including memory bandwidth, processing power for other apps or instances, without negatively affecting visual perception of the scene.
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公开(公告)号：US20180174359A1
公开(公告)日：2018-06-21
申请号：US15379529
申请日：2016-12-15
Applicant: MediaTek Inc.
Inventor： Ying-Chieh Chen , Shih-Chin Lin , Chih-Yu Chang
CPC classification number: G06T1/60 , G06T11/40 , G06T15/005 , G06T2210/08 , H04N19/00 , H04N19/436 , H04N19/587
Abstract: A graphics system provides frame difference generator hardware for dynamically adjusting a frame rate. The graphics system includes a graphics processing unit (GPU), which generates frames containing tiles of graphics data. The frame difference generator hardware receives the graphics data of a tile of a current frame from the GPU, in parallel with a frame buffer that also receives the graphics data. The frame difference generator hardware computes a difference value between a first value computed from the graphics data and a second value representing a corresponding tile of a previous frame, and accumulates difference values computed from multiple tiles of the current frame and the previous frame to obtain an accumulated value. The accumulated value is reported to software executed by the graphics system for determination of an adjustment to the frame rate.
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公开(公告)号：US20170213315A1
公开(公告)日：2017-07-27
申请号：US15242478
申请日：2016-08-19
Applicant: MediaTek Inc.
Inventor： Ying-Chieh Chen , I-Hsuan Lu , Shih-Chin Lin
Abstract: A graphics processing unit (GPU) renders graphical objects into a group of pixels and stores the pixels in an on-chip buffer on the same chip as the GPU. Each pixel has an alpha value that indicates transparency of the pixel. The GPU reads the alpha value of each pixel from the on-chip buffer. According to alpha values of the group of pixels, the GPU generates an alpha hint in the system memory for the group of pixels. The alpha hint represents an aggregate of the alpha values of the group of pixels. The GPU then stores the group of pixels into a frame buffer in the system memory.
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