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公开(公告)号：US11508707B2
公开(公告)日：2022-11-22
申请号：US16869574
申请日：2020-05-07
Applicant: MEDIATEK INC.
Inventor： Yao-Chun Su , Chih-Ching Chen , I-Hsuan Peng , Yi-Jou Lin
IPC: H01L25/16 , H01L23/367 , H01L23/16 , H01L23/31 , H01L23/538 , H01L23/00 , H01L49/02
Abstract: A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.
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公开(公告)号：US20230044797A1
公开(公告)日：2023-02-09
申请号：US17973318
申请日：2022-10-25
Applicant: MediaTek Inc.
Inventor： Yao-Chun Su , Chih-Ching Chen , I-Hsuan Peng , Yi-Jou Lin
IPC: H01L25/16 , H01L23/16 , H01L23/31 , H01L23/367 , H01L23/538 , H01L23/00 , H01L49/02
Abstract: A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.
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Patent Agency Ranking
公开(公告)号：US12183723B2
公开(公告)日：2024-12-31
申请号：US17973318
申请日：2022-10-25
Applicant: MediaTek Inc.
Inventor： Yao-Chun Su , Chih-Ching Chen , I-Hsuan Peng , Yi-Jou Lin
IPC: H01L25/16 , H01L23/00 , H01L23/16 , H01L23/31 , H01L23/367 , H01L23/538 , H01L49/02
Abstract: A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.
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公开(公告)号：US09792722B2
公开(公告)日：2017-10-17
申请号：US14576036
申请日：2014-12-18
Applicant: MediaTek Inc.
Inventor： Ming-Hao Liao , Chih-Ching Chen , Hung-Wei Wu
CPC classification number: G06T15/405 , G06T15/005
Abstract: A depth processing method and associated graphic processing circuit is provided. The method comprises loading geometry data of a scene and performing a vertex transformation thereof. After the geometry data is segmented in a tile resolution, pre-depth data of the scene are obtained. After the geometry data are segmented in a bin resolution, plural bin tables are generated. Then, the plural bin tables are converted into plural tiles, the plural converted tiles are classified into a first portion of tiles and a second portion of tiles according to depth data of the converted tiles and the pre-depth data of the scene, and the second portion of tiles are discarded. After the first portion of tiles are processed, a color value and a depth value of each pixel of the scene are generated.
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5.发明授权Graphic processing circuit with binning rendering and pre-depth processing method thereof 有权具有binning渲染的图形处理电路及其深度处理方法公开(公告)号：US09361697B1
公开(公告)日：2016-06-07
申请号：US14582134
申请日：2014-12-23
Applicant: MediaTek Inc.
Inventor： Ming-Hao Liao , Chih-Ching Chen , Shih-Chin Lin , Hung-Wei Wu
CPC classification number: G06T15/005 , G06T15/40
Abstract: A graphic processing circuit with binning rendering and associated pre-depth processing method is provided. Firstly, a first depth data of a first primitive corresponding to a specified tile is received. Then, the pre-depth data corresponding to the specified tile is read from a pre-Z buffer. If the first depth data is not larger than the pre-depth data and the first primitive is an opaque primitive, the pre-depth data is updated with the first depth data. If the first depth data is not larger than the pre-depth data and the first primitive is a translucent primitive, an uncertainty ordering range is defined according to the first depth data and the pre-depth data, and the pre-depth data is updated with the uncertainty ordering range.
Abstract translation: 提供了具有binning渲染和相关的预深度处理方法的图形处理电路。 首先，接收对应于指定瓦片的第一原语的第一深度数据。 然后，从预Z缓冲器读取对应于指定瓦片的预深度数据。 如果第一深度数据不大于预深度数据，并且第一原语是不透明原语，则用第一深度数据更新预深度数据。 如果第一深度数据不大于预深度数据，并且第一图元是半透明图元，则根据第一深度数据和预深度数据来定义不确定性排序范围，并且更新预深度数据 具有不确定性排序范围。
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公开(公告)号：US20160180579A1
公开(公告)日：2016-06-23
申请号：US14576036
申请日：2014-12-18
Applicant: MediaTek Inc.
Inventor： Ming-Hao Liao , Chih-Ching Chen , Hung-Wei Wu
CPC classification number: G06T15/405 , G06T15/005
Abstract: A depth processing method and associated graphic processing circuit is provided. The method comprises loading geometry data of a scene and performing a vertex transformation thereof. After the geometry data is segmented in a tile resolution, pre-depth data of the scene are obtained. After the geometry data are segmented in a bin resolution, plural bin tables are generated. Then, the plural bin tables are converted into plural tiles, the plural converted tiles are classified into a first portion of tiles and a second portion of tiles according to depth data of the converted tiles and the pre-depth data of the scene, and the second portion of tiles are discarded. After the first portion of tiles are processed, a color value and a depth value of each pixel of the scene are generated.
Abstract translation: 提供深度处理方法和相关的图形处理电路。 该方法包括加载场景的几何数据并执行其顶点变换。 在以瓦片分辨率分割几何数据之后，获得场景的深度数据。 在以数据分辨率分割几何数据之后，生成多个表格。 然后，将多个bin表转换成多个瓦片，根据转换瓦片的深度数据和场景的深度数据将多个转换瓦片分类为瓦片的第一部分和瓦片的第二部分，并且 瓦片的第二部分被丢弃。 在对瓷砖的第一部分进行处理之后，生成场景的每个像素的颜色值和深度值。
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7.发明申请Graphic Processing Circuit With Binning Rendering And Pre-Depth Processing Method Thereof 有权具有分层渲染和深度处理方法的图形处理电路公开(公告)号：US20160180539A1
公开(公告)日：2016-06-23
申请号：US14582134
申请日：2014-12-23
Applicant: MediaTek Inc.
Inventor： Ming-Hao Liao , Chih-Ching Chen , Shih-Chin Lin , Hung-Wei Wu
CPC classification number: G06T15/005 , G06T15/40
Abstract: A graphic processing circuit with binning rendering and associated pre-depth processing method is provided. Firstly, a first depth data of a first primitive corresponding to a specified tile is received. Then, the pre-depth data corresponding to the specified tile is read from a pre-Z buffer. If the first depth data is not larger than the pre-depth data and the first primitive is an opaque primitive, the pre-depth data is updated with the first depth data. If the first depth data is not larger than the pre-depth data and the first primitive is a translucent primitive, an uncertainty ordering range is defined according to the first depth data and the pre-depth data, and the pre-depth data is updated with the uncertainty ordering range.
Abstract translation: 提供了具有binning渲染和相关的预深度处理方法的图形处理电路。 首先，接收对应于指定瓦片的第一原语的第一深度数据。 然后，从预Z缓冲器读取对应于指定瓦片的预深度数据。 如果第一深度数据不大于预深度数据，并且第一原语是不透明原语，则用第一深度数据更新预深度数据。 如果第一深度数据不大于预深度数据，并且第一图元是半透明图元，则根据第一深度数据和预深度数据来定义不确定性排序范围，并且更新预深度数据 具有不确定性排序范围。
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