公开(公告)号：US20210135673A1

公开(公告)日：2021-05-06

申请号：US17065526

申请日：2020-10-08

Applicant: MEDIATEK INC.

Inventor： Hung-Chieh Tsai ,  Sheng-Hui Liao

IPC: H03K19/0185 ,  G05F3/24

Abstract: The present invention provides a reference voltage buffer comprises a reference voltage generator, a first operational amplifier, a first transistor, a first group of resistors, a first load, a second transistor, a second group of resistors and a second load. In the reference voltage buffer, the first load and the second load use active device to increase the settling time, and the first load, the second load and the reference voltage generator of the reference voltage buffer are resigned to have the same characteristics in response to the temperature variation to overcome the PVT issue, and the first load and the second load of the reference voltage buffer use the open-loop design to have large full-scale of the output reference voltages.

公开(公告)号：US11233513B2

公开(公告)日：2022-01-25

申请号：US17065526

申请日：2020-10-08

Applicant: MEDIATEK INC.

Inventor： Hung-Chieh Tsai ,  Sheng-Hui Liao

IPC: G05F1/10 ,  G05F3/02 ,  H03K19/0185 ,  G05F3/24

Abstract: The present invention provides a reference voltage buffer comprises a reference voltage generator, a first operational amplifier, a first transistor, a first group of resistors, a first load, a second transistor, a second group of resistors and a second load. In the reference voltage buffer, the first load and the second load use active device to increase the settling time, and the first load, the second load and the reference voltage generator of the reference voltage buffer are resigned to have the same characteristics in response to the temperature variation to overcome the PVT issue, and the first load and the second load of the reference voltage buffer use the open-loop design to have large full-scale of the output reference voltages.