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公开(公告)号:US20240303408A1
公开(公告)日:2024-09-12
申请号:US18598095
申请日:2024-03-07
Applicant: MEDIATEK Inc.
Inventor: Kun-Yu WANG , Sheng-Tai TSENG , Yi-Ying LIAO , Jen-Wei LEE , Ronald Kuo-Hua HO , Bo-Jiun HSU , Te-Wei CHEN , Chun-Chih YANG , Tai-Lai TUNG
IPC: G06F30/392 , G06F111/04
CPC classification number: G06F30/392 , G06F2111/04
Abstract: The application discloses a method and a system for shaping flexible blocks on a chip canvas in an integrated circuit design. An input is received describing geometric features of flexible blocks. A set of flexible blocks are generated based on the input. Obtained block areas of the set of flexible blocks are computed. Whether the set of flexible blocks are legal is determined based on determining whether area differences between the obtained block areas and a plurality of required areas for the set of flexible blocks meet a requirement. The set of flexible blocks are updated until the set of flexible blocks are all legal.
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公开(公告)号:US20240155185A1
公开(公告)日:2024-05-09
申请号:US18054022
申请日:2022-11-09
Applicant: MEDIATEK INC.
Inventor: Chia-Hao CHANG , You-Tsai JENG , Kai-Wen YEH , Yi-Cheng CHEN , Te-Chuan WANG , Kai-Wen CHENG , Chin-Lung LIN , Tai-Lai TUNG , Ko-Yin LAI
IPC: H04N21/4405 , H04N21/4363
CPC classification number: H04N21/4405 , H04N21/43635
Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
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公开(公告)号:US20240422382A1
公开(公告)日:2024-12-19
申请号:US18336274
申请日:2023-06-16
Applicant: MEDIATEK INC.
Inventor: You-Tsai JENG , Yi-Cheng CHEN , Kuo-Chang CHENG , Kai-Wen YEH , Chih-Wei CHOU , Chia-Hao CHANG , Chi-Chih CHEN , Yu-Sung CHANG , Chin-Lung LIN , Ko-Yin LAI , Tai-Lai TUNG
IPC: H04N21/4363
Abstract: A clock control method for a High Definition Multimedia Interface (HDMI) receiver operating in a power-saving mode in a sink device is provided. The HDMI receiver has a first module, a second module, and a third module. The clock control method includes the following stages. A clock signal is enabled to be sent to the first module and the third module during a first region of received data. The clock signal is disabled to be sent to the second module during the first region of the received data. The clock signal is enabled to be sent to the third module and the clock signal is disabled to be sent to the first module and the second module during a second region of the received data.
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