公开(公告)号：US09691540B2

公开(公告)日：2017-06-27

申请号：US14736653

申请日：2015-06-11

Applicant: MediaTek Inc.

Inventor： Tao-Yi Lee ,  Po-Sen Tseng ,  Ming-Da Tsai

IPC: H03H2/00 ,  H03H7/42 ,  H01F27/28 ,  H01L23/522 ,  H01L23/48

CPC classification number: H01F27/2847 ,  H01L23/48 ,  H01L23/5222 ,  H01L23/5227

Abstract: A hybrid passive device for synergizing at least one passive component which resides in at least one technology is provided. The hybrid passive device includes a first passive component and a second passive component. The first passive component resides in a first technology of the at least one technology and/or a second technology of the at least one technology, the second technology is different from the first technology, and a technology boundary is arranged between the second technology and the first technology. The second passive component of the at least one passive component is different from the first passive component. The second passive component resides in the first technology and/or the second technology, and the first passive component and the second passive component are electromagnetically coupled to each other through the technology boundary.

公开(公告)号：US09859356B2

公开(公告)日：2018-01-02

申请号：US15044121

申请日：2016-02-16

Applicant: MEDIATEK INC.

Inventor： Ming-Da Tsai ,  Tao-Yi Lee ,  Cheng-Chou Hung ,  Tung-Hsing Lee

IPC: H01L29/00 ,  H01L49/02 ,  H01L23/522

CPC classification number: H01L28/10 ,  H01L23/5227

Abstract: A semiconductor integrated circuit includes an inductor and a plurality of high permeability patterns. The inductor includes one conductive loop. The high permeability patterns are disposed adjacent to the conductive loop.

公开(公告)号：US20160351653A1

公开(公告)日：2016-12-01

申请号：US15044121

申请日：2016-02-16

Applicant: MEDIATEK INC.

Inventor： Ming-Da Tsai ,  Tao-Yi Lee ,  Cheng-Chou Hung ,  Tung-Hsing Lee

IPC: H01L49/02 ,  H01L23/532 ,  H01L23/528

CPC classification number: H01L28/10 ,  H01L23/5227

Abstract: A semiconductor integrated circuit includes an inductor and a plurality of high permeability patterns. The inductor includes one conductive loop. The high permeability patterns are disposed adjacent to the conductive loop.

Abstract translation: 半导体集成电路包括电感器和多个高磁导率图案。 电感器包括一个导电回路。 高导磁率图案设置在导电环路附近。