公开(公告)号：US11449453B2

公开(公告)日：2022-09-20

申请号：US17165898

申请日：2021-02-02

Applicant: MEDIATEK INC.

Inventor： Chun-Yuan Yeh ,  Yan-Bin Luo ,  Tse-Hsiang Hsu

IPC: G06F15/78 ,  G06F11/07 ,  G06F13/40 ,  G06F13/20 ,  G06F13/42 ,  H01L25/065

Abstract: A multi-package system includes a first semiconductor package and a second semiconductor package. The first semiconductor package includes a first die and a second die. The second semiconductor package includes a third die. A first processing circuit of the first die communicates with a second processing circuit of the second die through a first configurable input/output (IO) interface circuit of the first die and a third configurable IO interface circuit of the second die that are configured to perform single-ended intra-package communication. The first processing circuit of the first die communicates with a third processing circuit of the third die through a second configurable IO interface circuit of the first die and a fourth configurable IO interface circuit of the third die that are configured to perform differential inter-package communication. The first configurable IO interface circuit and the second configurable IO interface circuit have a same circuit design.

公开(公告)号：US20210326292A1

公开(公告)日：2021-10-21

申请号：US17165898

申请日：2021-02-02

Applicant: MEDIATEK INC.

Inventor： Chun-Yuan Yeh ,  Yan-Bin Luo ,  Tse-Hsiang Hsu

IPC: G06F13/40 ,  G06F13/20 ,  G06F13/42

Abstract: A multi-package system includes a first semiconductor package and a second semiconductor package. The first semiconductor package includes a first die and a second die. The second semiconductor package includes a third die. A first processing circuit of the first die communicates with a second processing circuit of the second die through a first configurable input/output (IO) interface circuit of the first die and a third configurable IO interface circuit of the second die that are configured to perform single-ended intra-package communication. The first processing circuit of the first die communicates with a third processing circuit of the third die through a second configurable IO interface circuit of the first die and a fourth configurable IO interface circuit of the third die that are configured to perform differential inter-package communication. The first configurable IO interface circuit and the second configurable IO interface circuit have a same circuit design.