公开(公告)号：US20240039548A1

公开(公告)日：2024-02-01

申请号：US18206623

申请日：2023-06-07

Applicant: MEDIATEK INC.

Inventor： Wei-Hao Sun ,  Chuan-Hung Hsiao ,  Sung-Han Wen

IPC: H03M1/06

CPC classification number: H03M1/0604

Abstract: A digital-to-analog converter (DAC) includes a plurality of DAC cells, a mismatch error sorting circuit, and a dynamic element matching (DEM) circuit. The mismatch error sorting circuit generates a sorting result of the plurality of DAC cells according to mismatch error levels of the plurality of DAC cells. The DEM circuit shapes the mismatch error levels of the plurality of DAC cells according to the sorting result of the plurality of DAC cells.