Fast in-service software updating using multi-layer memory

    公开(公告)号:US12182563B2

    公开(公告)日:2024-12-31

    申请号:US18092466

    申请日:2023-01-03

    Inventor: Yair Chasdai

    Abstract: A peripheral device includes a bus interface, a first processor and a second processor. The bus interface is to communicate over a peripheral bus. The first processor is to manage communication over the peripheral bus by executing bus-maintenance software code, the bus-maintenance software code being executed from one or more first layers of a multi-layer memory. The second processor is to update the bus-maintenance software code from an existing version to an updated version, by (i) loading the updated version to one or more second layers of the multi-layer memory, higher in hierarchy than the one or more first layers, and (ii) invalidating the existing version in the one or more first layers, thereby forcing fetching of the updated version from the one or more second layers to the one or more first layers and to start executing the updated version.

    Network device with real-time data-path optimization

    公开(公告)号:US11627074B1

    公开(公告)日:2023-04-11

    申请号:US17582040

    申请日:2022-01-24

    Abstract: A network device includes at least one port, a memory, data-path circuitry, and a processor. The at least one port is to exchange packets with a network. The data-path circuitry is to process the packets. The memory is to store signatures of traffic patterns according to a locality-sensitive signature function., and corresponding parameter settings for the data-path circuitry. The processor is to assess a current traffic pattern of the packets, to calculate a current signature over the current traffic pattern using the locality-sensitive signature function, to query the memory using the current signature, to configure the data-path circuitry, in response to finding a stored signature that is within a specified distance from the current signature, with a parameter setting that corresponds to the found signature, and take an alternative action in response to finding that no stored signature is within the specified distance from the current signature.

    Fast In-Service Software Updating using Multi-Layer Memory

    公开(公告)号:US20240220228A1

    公开(公告)日:2024-07-04

    申请号:US18092466

    申请日:2023-01-03

    Inventor: Yair Chasdai

    CPC classification number: G06F8/65 G06F13/105

    Abstract: A peripheral device includes a bus interface, a first processor and a second processor. The bus interface is to communicate over a peripheral bus. The first processor is to manage communication over the peripheral bus by executing bus-maintenance software code, the bus-maintenance software code being executed from one or more first layers of a multi-layer memory. The second processor is to update the bus-maintenance software code from an existing version to an updated version, by (i) loading the updated version to one or more second layers of the multi-layer memory, higher in hierarchy than the one or more first layers, and (ii) invalidating the existing version in the one or more first layers, thereby forcing fetching of the updated version from the one or more second layers to the one or more first layers and to start executing the updated version.

    Fast In-Service Software Updating using Multi-Layer Memory

    公开(公告)号:US20250036391A1

    公开(公告)日:2025-01-30

    申请号:US18911312

    申请日:2024-10-10

    Inventor: Yair Chasdai

    Abstract: A peripheral device includes a bus interface, a first processor and a second processor. The bus interface is to communicate over a peripheral bus. The first processor is to manage communication over the peripheral bus by executing bus-maintenance software code, the bus-maintenance software code being executed from one or more first layers of a multi-layer memory. The second processor is to update the bus-maintenance software code from an existing version to an updated version, by (i) loading the updated version to one or more second layers of the multi-layer memory, higher in hierarchy than the or one more first layers, and (ii) invalidating the existing version in the one or more first layers, thereby forcing fetching of the updated version from the one or more second layers to the one or more first layers and to start executing the updated version.

    Cycle-based per-flow packet drop counting

    公开(公告)号:US12107744B2

    公开(公告)日:2024-10-01

    申请号:US17742454

    申请日:2022-05-12

    CPC classification number: H04L43/0835

    Abstract: A system for cycle-based per-flow packet drop counting. The system comprises a communication network which interconnects nodes including receiver/s, supervisor/s, and sender/s. The sender sends flow/s of packets, via link/s, to the receiver/s. Flow/s are divided into cycles whose lengths are known to sender, receiver and supervisor. The sender adds to each packet indications of: a cycle during which the packet was sent, and whether the packet belongs to a given flow for which packet drops are being counted. The sender reports to the supervisor a number of packets sent during the individual cycle. The receiver reports to the supervisor, by counting indications, for the individual flow, how many packets, sent during the individual cycle, were received. The supervisor computes a difference between the number of packets sent and received, and, for certain difference value/s, implements further action/s.

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