公开(公告)号：US20190362793A1

公开(公告)日：2019-11-28

申请号：US16537345

申请日：2019-08-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： YAFENG ZHANG ,  LIANG QIAO ,  CHUNYUAN HOU ,  JUN XU

IPC: G11C16/22 ,  G11C16/14 ,  G11C16/30

Abstract: Apparatuses and methods for protecting transistors through charge sharing are disclosed herein. An example apparatus includes a transistor comprising a gate node and a bulk node, a charge sharing circuit coupled between the gate and bulk nodes, and logic. The charge sharing circuit is configure to equalize charge differences between the gate and bulk nodes, and the logic is configured to enable the charge sharing circuit based at least in part on a combination of first and second signals, which indicate the presence of a condition.

公开(公告)号：US20210027844A1

公开(公告)日：2021-01-28

申请号：US17066387

申请日：2020-10-08

Applicant: MICRON TECHNOLOGY, INC.

Inventor： YAFENG ZHANG ,  LIANG QIAO ,  CHUNYUAN HOU ,  JUN XU

IPC: G11C16/22 ,  G11C16/14 ,  G11C16/30

Abstract: Apparatuses and methods for protecting transistors through charge sharing are disclosed herein. An example apparatus includes a transistor comprising a gate node and a bulk node, a charge sharing circuit coupled between the gate and bulk nodes, and logic. The charge sharing circuit is configure to equalize charge differences between the gate and bulk nodes, and the logic is configured to enable the charge sharing circuit based at least in part on a combination of first and second signals, which indicate the presence of a condition.

公开(公告)号：US20180108420A1

公开(公告)日：2018-04-19

申请号：US15841107

申请日：2017-12-13

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Yafeng Zhang ,  LIANG QIAO ,  CHUNYUAN HOU ,  JUN XU

IPC: G11C16/22 ,  G11C16/30 ,  G11C16/14

CPC classification number: G11C16/225 ,  G11C16/14 ,  G11C16/30

Abstract: Apparatuses and methods for protecting transistors through charge sharing are disclosed herein. An example apparatus includes a transistor comprising a gate node and a bulk node, a charge sharing circuit coupled between the gate and bulk nodes, and logic. The charge sharing circuit is configure to equalize charge differences between the gate and bulk nodes, and the logic is configured to enable the charge sharing circuit based at least in part on a combination of first and second signals, which indicate the presence of a condition.

公开(公告)号：US20170140830A1

公开(公告)日：2017-05-18

申请号：US14430448

申请日：2015-02-02

Applicant: MICRON TECHNOLOGY, INC.

Inventor： YAFENG ZHANG ,  LIANG QIAO ,  CHUNYUAN HOU ,  JUN XU

IPC: G11C16/22 ,  G11C16/30 ,  G11C16/14

CPC classification number: G11C16/225 ,  G11C16/14 ,  G11C16/30

Abstract: Apparatuses and methods for protecting transistors through charge sharing are disclosed herein. An example apparatus includes a transistor comprising a gate node and a bulk node, a charge sharing circuit coupled between the gate and bulk nodes, and logic. The charge sharing circuit is configure to equalize charge differences between the gate and bulk nodes, and the logic is configured to enable the charge sharing circuit based at least in part on a combination of first and second signals, which indicate the presence of a condition.