公开(公告)号：US20200304114A1

公开(公告)日：2020-09-24

申请号：US16358568

申请日：2019-03-19

Applicant: MICRON TECHNOLOGY, INC.

Inventor： TETSUYA ARAI ,  JUNKI TANIGUCHI

IPC: H03K5/135 ,  H03K3/037 ,  H03M9/00 ,  H03K17/687 ,  G11C7/10

Abstract: Disclosed herein is an apparatus that includes a data serializer including a plurality of first buffer circuits configured to receive a plurality of data, respectively, and a second buffer circuit configured to serialize the plurality of data provided from the plurality of first buffer circuits. At least one of the plurality of first buffer circuits and the second buffer circuit includes: a first circuit configured to drive a first signal node to one of first and second logic levels based on an input signal, the first circuit including a first adjustment circuit configured to adjust a driving capability of the first circuit when the first circuit drives the first signal node to the first logic level, and a second circuit configured to drive the first signal node to other of the first and second logic levels.