公开(公告)号：US10734046B2

公开(公告)日：2020-08-04

申请号：US16436655

申请日：2019-06-10

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Katsuhiro Kitagawa ,  Akira Yamashita ,  Shuichi Murai ,  Kohei Nakamura

IPC: G11C7/22 ,  G11C11/4076 ,  H03K5/15 ,  H03K5/00

Abstract: Apparatuses and methods for providing voltages to conductive lines between which clock signal lines are disposed are disclosed. Voltages provided to the conductive lines may provide voltage conditions for clock signals on the clock signal lines that are relatively the same for at least some of the clock edges of the clock signals. Having the same voltage conditions may mitigate variations in timing/phase between the clock signals due to different voltage influences when a clock signal transitions from a low clock level to a high clock level.

公开(公告)号：US10693460B1

公开(公告)日：2020-06-23

申请号：US16544451

申请日：2019-08-19

Applicant: Micron Technology, Inc.

Inventor： Hiroki Takahashi ,  Shuichi Murai

IPC: H03K19/00 ,  G11C11/4093 ,  H03K19/0175

Abstract: Memory devices employ circuitry that may be used to adjust the output impedance. Embodiments describe herein relate to fuse-based adjustment circuitry that may be used to assist output impedance compensation such as ZQ calibration, and facilitate reduction in the dimensions and/or power consumption of the memory device.

公开(公告)号：US10418081B1

公开(公告)日：2019-09-17

申请号：US16156862

申请日：2018-10-10

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Katsuhiro Kitagawa ,  Akira Yamashita ,  Shuichi Murai ,  Kohei Nakamura

IPC: G11C7/22 ,  G11C11/4076 ,  H03K5/15 ,  H03K5/00

Abstract: Apparatuses and methods for providing voltages to conductive lines between which clock signal lines are disposed are disclosed. Voltages provided to the conductive lines may provide voltage conditions for clock signals on the clock signal lines that are relatively the same for at least some of the clock edges of the clock signals. Having the same voltage conditions may mitigate variations in timing/phase between the clock signals due to different voltage influences when a clock signal transitions from a low clock level to a high clock level.

公开(公告)号：US11936377B2

公开(公告)日：2024-03-19

申请号：US17741299

申请日：2022-05-10

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Shuichi Murai ,  Nobuki Takahashi

IPC: H03K19/00 ,  G11C7/10

CPC classification number: H03K19/0005 ,  G11C7/1057 ,  G11C7/1063 ,  G11C7/1084 ,  G11C7/109

Abstract: Apparatuses including an impedance code selector are disclosed. An example apparatus according to the disclosure includes an impedance calibration circuit, an impedance code selector and a driver circuit in a data input/output circuit. The impedance calibration circuit provides a first impedance code. The impedance code selector provides either the first impedance code or a second impedance code. The driver circuit receives either the first impedance code or the second impedance code from the impedance code selector.

公开(公告)号：US20200118608A1

公开(公告)日：2020-04-16

申请号：US16436655

申请日：2019-06-10

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Katsuhiro Kitagawa ,  Akira Yamashita ,  Shuichi Murai ,  Kohei Nakamura

IPC: G11C7/22 ,  H03K5/15 ,  G11C11/4076

Abstract: Apparatuses and methods for providing voltages to conductive lines between which clock signal lines are disposed are disclosed. Voltages provided to the conductive lines may provide voltage conditions for clock signals on the clock signal lines that are relatively the same for at least some of the clock edges of the clock signals. Having the same voltage conditions may mitigate variations in timing/phase between the clock signals due to different voltage influences when a clock signal transitions from a low clock level to a high clock level.