公开(公告)号：US09563369B2

公开(公告)日：2017-02-07

申请号：US14252673

申请日：2014-04-14

Applicant: MICROSOFT TECHNOLOGY LICENSING, LLC

Inventor： Nhon Toai Quach ,  Susan Carrie ,  Jeffrey Andrews ,  John Sell ,  Kevin Po

IPC: G06F3/06 ,  G06F13/16

CPC classification number: G06F3/0613 ,  G06F3/0631 ,  G06F3/0674 ,  G06F13/1605 ,  G06F13/1626 ,  G06F13/1642 ,  G06F13/1668

Abstract: Systems and methods for applying a fine-grained QoS logic are provided. The system may include a memory controller, the memory controller configured to receive memory access requests from a plurality of masters via a bus fabric. The memory controller determines the priority class of each of the plurality of masters, and further determines the amount of memory data bus bandwidth consumed by each master on the memory data bus. Based on the priority class assigned to each of the masters and the amount of memory data bus bandwidth consumed by each master, the memory controller applies a fine-grained QoS logic to compute a schedule for the memory requests. Based on this schedule, the memory controller converts the memory requests to memory commands, sends the memory commands to a memory device via a memory command bus, and receives a response from the memory device via a memory data bus.

Abstract translation: 提供了应用细粒度的QoS逻辑的系统和方法。 该系统可以包括存储器控制器，该存储器控制器经配置以经由总线结构从多个主器件接收存储器访问请求。 存储器控制器确定多个主器件中的每一个的优先等级，并进一步确定存储器数据总线上每个主器件消耗的存储器数据总线带宽的量。 基于分配给每个主器件的优先级等级和每个主器件消耗的存储器数据总线带宽的数量，存储器控制器应用细粒度的QoS逻辑来计算存储器请求的调度。 基于该时间表，存储器控制器将存储器请求转换为存储器命令，通过存储器命令总线将存储器命令发送到存储器设备，并且经由存储器数据总线从存储器设备接收响应。