公开(公告)号：US09773554B2

公开(公告)日：2017-09-26

申请号：US14242757

申请日：2014-04-01

Applicant: Macronix International Co., Ltd.

Inventor： Chih-Wei Lee ,  Tien-Fan Ou ,  Jyun-Siang Huang ,  Chien-Hung Liu

IPC: H01L27/11 ,  H01L27/112 ,  G11C16/04 ,  H01L27/11568 ,  H01L21/265 ,  H01L29/10 ,  H01L29/167

CPC classification number: G11C16/0491 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/26586 ,  H01L27/11568 ,  H01L29/1045 ,  H01L29/167

Abstract: An integrated circuit comprises a memory array including diffusion bit lines having composite impurity profiles in a substrate. A plurality of word lines overlies channel regions in the substrate between the diffusion bit lines, with data storage structures such as floating gate structures or dielectric charge trapping structures, at the cross-points. The composite impurity diffusion bit lines provide source/drain terminals on opposing sides of the channel regions that have high conductivity, good depth and steep doping profiles, even with channel region critical dimensions below 50 nanometers.