Abstract:
A circuit generates a reference voltage that is independent of temperature. The circuit is built on a substrate according to a CMOS technology, and includes a first stage for generating a first current proportional to temperature and a second stage for generating a second current inversely proportional to temperature. These first and second currents are summed in a resistor connected to a voltage distinct from the ground of the first and second stages and formed by the voltage of the substrate on which the circuit is built.
Abstract:
The present invention relates to a current amplifier including a first MOS transistor with a drain defining a first terminal for controlling the amplifier with a current and a source connected to a first supply line. It also includes a second MOS transistor with a drain forming a terminal of current output of the amplifier and a source connected to the first supply line, and at least one first bipolar transistor having a base connected to the first control terminal, an emitter connected to a gate of the first MOS transistor and is, via a first biasing resistor, connected to the first supply line and having a collector of the first bipolar transistor being connected to a second supply line.
Abstract:
A power amplifier device is disclosed, comprising a differential amplifier with determined transconductance followed by an intermediate amplification stage with a compensation capacitor between its output and its input and a push-pull output amplifier under low output impedance, for which the common point of connection between an upper stage and a lower stage gives an output of the device. A feedback loop between the output and the differential amplifier is provided in order to temporarily increase the transconductance of the differential amplifier at the passage of the conduction from one stage to the other stage of the push-pull amplifier.
Abstract:
The present invention relates to a power amplifier having an output stage in MOS technology, including an upper half-output stage comprised of two P-channel MOS power transistors mounted as a current mirror, a lower half-output stage comprised of two N-channel MOS power transistors mounted as a current mirror, an output terminal of the amplifier corresponding to the common drains of a first MOS transistor of the upper stage and of a first MOS transistor of the lower stage, and a control stage in bipolar technology for setting, according to a control voltage, two control currents of the half-output stages.
Abstract:
A circuit generates a reference voltage that is independent of temperature. The circuit is built on a substrate according to a CMOS technology, and includes a first stage for generating a first current proportional to temperature and a second stage for generating a second current inversely proportional to temperature. These first and second currents are summed in a resistor connected to a voltage distinct from the ground of the first and second stages and formed by the voltage of the substrate on which the circuit is built.
Abstract:
A class AB amplifier circuit includes a complementary output stage and a biasing circuit for biasing the output stage. The complementary output stage includes a P-type MOS transistor and an N-type MOS transistor, and the biasing circuit includes a bipolar transistor. The emitter and collector of the bipolar transistor are respectively connected to the gates of the P-type and N-type MOS transistors. The bipolar transistor is biased for controlling a bias voltage between the respective gates of the P-type and N-type MOS transistors.
Abstract:
A circuit for providing a reference voltage, including a first transistor of bipolar type, the emitter of which provides the reference voltage and the collector of which is connected to a first supply pole, a second MOS-type transistor, the drain of which is connected to the base of the first transistor and the source of which is connected to a second supply pole, a control block, an output of which is connected to the gate of the second transistor and an input of which is connected to the emitter of the first transistor, a capacitor connected to the output of the control block and coupled to the first supply pole via a first impedance, and a second impedance connected on the one hand to the second transistor and on the other hand to the connection point between the capacitor and the first impedance.