公开(公告)号：US5504700A

公开(公告)日：1996-04-02

申请号：US199714

申请日：1994-02-22

申请人： Mark Insley ,  Stephen Berry ,  Jay C. Robinson

发明人： Mark Insley ,  Stephen Berry ,  Jay C. Robinson

IPC分类号： G11C5/00 ,  G11C5/04

CPC分类号： G11C5/04 ,  H01L25/18 ,  H01L2924/0002

摘要： The invention provides a method and apparatus for a memory device interface between a memory device and a CPU as well as the dimensions of the memory device. An electric circuit of the present invention has one-hundred-twenty pins along the length of the housing. The housing of the memory device has a length of approximately 85.6 mm and a width of approximately 54.0 mm. The left and right side socket interface portions of the housing have a minimum width of approximately 3.3 mm. The top socket interface portion has a maximum thickness of approximately 3.5 mm and a minimum height of approximately 3.0 mm. The bottom socket interface portion has a maximum thickness of approximately 5.0 mm and a minimum height of approximately 10.5 mm. Furthermore, the memory device interface portion of the present invention includes at least one pin which provides access to an address signal which indicates a memory array address location within the memory device. The interface portion also includes at least one pin which provides access to a data signal. Additionally, the interface portion includes a row address strobe signal which indicates that the address signal provided to the memory device is a row address, similarly at least one pin providing access to a column address strobe signal is included in the interface portion of the present invention. This column address strobe signal indicates that the address signal provided to the memory device is a column address. Further, at least one pin providing access to a memory write signal and at least one pin providing access to a memory output enable signal are included in the interface portion. Finally, the memory device interface of the present invention provides access to a power supply and to ground.

摘要翻译： 本发明提供了一种用于存储器件与CPU之间的存储器件接口以及存储器件的尺寸的方法和装置。 本发明的电路沿着壳体的长度具有一百二十个销。 存储装置的外壳的长度约为85.6毫米，宽度约为54.0毫米。 壳体的左侧和右侧插座接口部分具有大约3.3mm的最小宽度。 顶部插座接口部分具有约3.5mm的最大厚度和约3.0mm的最小高度。 底部插座接口部分具有大约5.0mm的最大厚度和大约10.5mm的最小高度。 此外，本发明的存储器件接口部分包括至少一个引脚，其提供对指示存储器件内的存储器阵列地址位置的地址信号的访问。 接口部分还包括提供对数据信号的访问的至少一个引脚。 此外，接口部分包括指示提供给存储器件的地址信号是行地址的行地址选通信号，类似地，提供对列地址选通信号的访问的至少一个引脚包括在本发明的接口部分中 。 该列地址选通信号指示提供给存储器件的地址信号是列地址。 此外，在接口部分中包括提供对存储器写入信号的访问的至少一个引脚和提供对存储器输出使能信号的访问的至少一个引脚。 最后，本发明的存储器件接口提供对电源和接地的访问。