Delay circuit for changeably delaying an analog signal
    1.
    发明授权
    Delay circuit for changeably delaying an analog signal 失效
    用于可变延迟模拟信号的延迟电路

    公开(公告)号:US5361043A

    公开(公告)日:1994-11-01

    申请号:US047519

    申请日:1993-04-19

    CPC分类号: H03H11/265

    摘要: A delay circuit is provided with an npn type of transistor of which a base is connected to an input terminal, a first constant current source through which a constant current flows from an emitter of the transistor to ground, a first capacitor arranged between the emitter of the transistor and an electric source terminal, a second capacitor C.sub.22 arranged between a collector of the transistor and an output terminal, a first resistor arranged between the emitter of the transistor and the output terminal, a second resistor arranged between the collector of the transistor and the electric source terminal. The constant current of the constant current source is changeable, and an emitter resistance of the transistor is changed depending on the constant current. Therefore, an analog signal applied to the input terminal is changeably delayed by coaction of the resistors, the capacitors and the emitter resistance adjusted by changing the constant current of the constant current source.

    摘要翻译: 延迟电路设置有npn型晶体管,其基极连接到输入端子,恒定电流通过其从晶体管的发射极流到地的第一恒流源,布置在晶体管的发射极之间的第一电容器, 所述晶体管和电源端子,布置在所述晶体管的集电极和输出端子之间的第二电容器C22,布置在所述晶体管的发射极和所述输出端子之间的第一电阻器,布置在所述晶体管的集电极和所述晶体管的集电极之间的第二电阻器, 电源端子。 恒定电流源的恒定电流是可变的,并且晶体管的发射极电阻根据恒定电流而改变。 因此,通过改变恒定电流源的恒定电流而调节的电阻器,电容器和发射极电阻的共同作用,施加到输入端子的模拟信号可变化地延迟。