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公开(公告)号：US5361043A
公开(公告)日：1994-11-01
申请号：US047519
申请日：1993-04-19
CPC分类号： H03H11/265
摘要： A delay circuit is provided with an npn type of transistor of which a base is connected to an input terminal, a first constant current source through which a constant current flows from an emitter of the transistor to ground, a first capacitor arranged between the emitter of the transistor and an electric source terminal, a second capacitor C.sub.22 arranged between a collector of the transistor and an output terminal, a first resistor arranged between the emitter of the transistor and the output terminal, a second resistor arranged between the collector of the transistor and the electric source terminal. The constant current of the constant current source is changeable, and an emitter resistance of the transistor is changed depending on the constant current. Therefore, an analog signal applied to the input terminal is changeably delayed by coaction of the resistors, the capacitors and the emitter resistance adjusted by changing the constant current of the constant current source.
摘要翻译： 延迟电路设置有npn型晶体管，其基极连接到输入端子，恒定电流通过其从晶体管的发射极流到地的第一恒流源，布置在晶体管的发射极之间的第一电容器， 所述晶体管和电源端子，布置在所述晶体管的集电极和输出端子之间的第二电容器C22，布置在所述晶体管的发射极和所述输出端子之间的第一电阻器，布置在所述晶体管的集电极和所述晶体管的集电极之间的第二电阻器， 电源端子。 恒定电流源的恒定电流是可变的，并且晶体管的发射极电阻根据恒定电流而改变。 因此，通过改变恒定电流源的恒定电流而调节的电阻器，电容器和发射极电阻的共同作用，施加到输入端子的模拟信号可变化地延迟。
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公开(公告)号：US20140049237A1
公开(公告)日：2014-02-20
申请号：US14113241
申请日：2012-04-19
申请人： Hideo Hara , Yoshio Higashida , Kazuhiro Murakami
发明人： Hideo Hara , Yoshio Higashida , Kazuhiro Murakami
IPC分类号： H02M3/158
摘要： Provided is a switching power source device in which fluctuation of the switching frequency can be suppressed without impairing the advantages of a non-linear control system. A switching power source device is provided with: switching control units of non-linear control type that generate an output voltage (out) from an input voltage (IN) by performing ON/OFF control of switching elements in accordance with the results of comparing a feedback voltage (FB) and reference voltage (REF); and an ON time setting unit that monitors switching voltage (SW) appearing at one end of the switch terminals, and sets the ON time (Ton) of the switching element in the switching control units based on the duty of the switching voltage (SW).
摘要翻译： 提供一种可以抑制开关频率的波动而不损害非线性控制系统的优点的开关电源装置。 开关电源装置具有：根据比较结果的开关元件的ON / OFF控制，从输入电压（IN）产生输出电压（out）的非线性控制型开关控制单元 反馈电压（FB）和参考电压（REF）; 以及接通时间设定单元，其监视在开关端子的一端出现的开关电压（SW），并且基于开关电压（SW）的占空比来设定开关元件的导通时间（Ton） 。
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公开(公告)号：US09240717B2
公开(公告)日：2016-01-19
申请号：US14113241
申请日：2012-04-19
申请人： Hideo Hara , Yoshio Higashida , Kazuhiro Murakami
发明人： Hideo Hara , Yoshio Higashida , Kazuhiro Murakami
摘要： Provided is a switching power source device in which fluctuation of the switching frequency can be suppressed without impairing the advantages of a non-linear control system. A switching power source device is provided with: switching control units of non-linear control type that generate an output voltage (out) from an input voltage (IN) by performing ON/OFF control of switching elements in accordance with the results of comparing a feedback voltage (FB) and reference voltage (REF); and an ON time setting unit that monitors switching voltage (SW) appearing at one end of the switch terminals, and sets the ON time (Ton) of the switching element in the switching control units based on the duty of the switching voltage (SW).
摘要翻译： 提供一种可以抑制开关频率的波动而不损害非线性控制系统的优点的开关电源装置。 开关电源装置具有：根据比较结果的开关元件的ON / OFF控制，从输入电压（IN）产生输出电压（out）的非线性控制型开关控制单元 反馈电压（FB）和参考电压（REF）; 以及接通时间设定单元，其监视在开关端子的一端出现的开关电压（SW），并且基于开关电压（SW）的占空比来设定开关元件的导通时间（Ton） 。
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4.发明授权Timing recovering apparatus having window periods determined by period of clock signal 失效具有由时钟信号周期确定的窗口周期的定时恢复装置
公开(公告)号：US5490181A
公开(公告)日：1996-02-06
申请号：US391295
申请日：1995-02-21
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/1403
摘要： A timing recovering apparatus comprises an equalizer for equalizing a digital data signal subjected to interleaved NRZI such that the digital data signal has partial response (1, 0, -1), two comparators for comparing the equalized data signal with two different reference levels, two phase comparing portions for detecting phase difference between the outputs of the comparators and a reproduced clock signal separately, an adder for summing the outputs of the phase comparators, and a VCO for generating the reproduce clock signal in accordance with the output of the adder. This timing recovering apparatus performs phase comparing with two different phase comparators and PLL control is performed on the sum of the outputs of the two different phase comparators, so that the clock signal is not affected by data pattern of the data signal. An automatic slice apparatus comprises the equalizer for equalizing a digital data signal subjected to interleaved NRZI, and two comparators supplied with reference levels, and the timing recovering apparatus, detects amplitude of the output of the equalizer in response to the reproduced clock signal to compensate the reference levels.
摘要翻译： 定时恢复装置包括均衡器，用于对经过交错NRZI的数字数据信号进行均衡，使得数字数据信号具有部分响应（1,0，-1），两个比较器，用于将均衡数据信号与两个不同的参考电平进行比较，两个比较器 相位比较部分，用于分别检测比较器的输出和再生时钟信号之间的相位差，用于对相位比较器的输出求和的加法器和用于根据加法器的输出产生再生时钟信号的VCO。 该定时恢复装置与两个不同的相位比较器进行相位比较，并且对两个不同相位比较器的输出之和执行PLL控制，使得时钟信号不受数据信号的数据模式的影响。 自动切片装置包括均衡器，用于对经过交织的NRZI的数字数据信号进行均衡，两个比较器被提供参考电平，定时恢复装置响应于再现的时钟信号检测均衡器的输出的幅度，以补偿 参考水平
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