公开(公告)号：US20120056241A1

公开(公告)日：2012-03-08

申请号：US13225648

申请日：2011-09-06

申请人： Masakiyo SUMITOMO ,  Yasushi Higuchi ,  Shigemitsu Fukatsu

发明人： Masakiyo SUMITOMO ,  Yasushi Higuchi ,  Shigemitsu Fukatsu

IPC分类号： H01L29/739 ,  H01L21/331 ,  H01L21/28

CPC分类号： H01L29/7397 ,  H01L29/0619 ,  H01L29/0834 ,  H01L29/0839 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/66348

摘要： A semiconductor device includes a drift layer, a base layer on the drift layer, and trench gate structures. Each trench gate structure includes a trench reaching the drift layer by penetrating the base layer, a gate insulation layer on a wall surface of the trench, and a gate electrode on the gate insulation layer. A bottom portion of the trench gate structure is located in the drift layer and expands in a predetermined direction so that a distance between the bottom portions of adjacent trench gate structures is less than a distance between opening portions of adjacent trench gate structures in the direction. A thickness of the gate insulation layer is greater in the bottom portion than in the opening portion.

摘要翻译： 半导体器件包括漂移层，漂移层上的基极层和沟槽栅极结构。 每个沟槽栅极结构包括通过穿透基底层到达漂移层的沟槽，在沟槽的壁表面上的栅极绝缘层和栅极绝缘层上的栅极电极。 沟槽栅极结构的底部位于漂移层中并沿预定方向膨胀，使得相邻沟槽栅极结构的底部之间的距离小于相邻沟槽栅极结构在该方向上的开口部分之间的距离。 栅极绝缘层的厚度在底部比在开口部分大。

公开(公告)号：US20120007173A1

公开(公告)日：2012-01-12

申请号：US13177707

申请日：2011-07-07

申请人： Tsuyoshi YAMAMOTO ,  Masakiyo SUMITOMO ,  Hitoshi YAMAGUCHI ,  Nozomu AKAGI ,  Yuma KAGATA

发明人： Tsuyoshi YAMAMOTO ,  Masakiyo SUMITOMO ,  Hitoshi YAMAGUCHI ,  Nozomu AKAGI ,  Yuma KAGATA

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66734 ,  H01L29/7811

摘要： A semiconductor device includes: a substrate; multiple first and second conductive type regions on the substrate for providing a super junction structure; a channel layer on the super junction structure; a first conductive type layer in the channel layer; a contact second conductive type region in the channel layer; a gate electrode on the channel layer via a gate insulation film; a surface electrode on the channel layer; a backside electrode on the substrate opposite to the super junction structure; and an embedded second conductive type region. The embedded second conductive type region is disposed in a corresponding second conductive type region, protrudes into the channel layer, and contacts the contact second conductive type region. The embedded second conductive type region has an impurity concentration higher than the channel layer, and has a maximum impurity concentration at a position in the corresponding second conductive type region.

摘要翻译： 半导体器件包括：衬底; 用于提供超结结构的衬底上的多个第一和第二导电类型区域; 超级结结构上的沟道层; 沟道层中的第一导电类型层; 沟道层中的接触第二导电类型区域; 通过栅极绝缘膜在沟道层上形成栅电极; 沟道层上的表面电极; 衬底上的与超结结构相反的背面电极; 和嵌入式第二导电类型区域。 嵌入的第二导电类型区域设置在相应的第二导电类型区域中，突出到沟道层中，并且与接触第二导电类型区域接触。 嵌入的第二导电类型区域的杂质浓度高于沟道层，并且在相应的第二导电类型区域的位置具有最大的杂质浓度。