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1.发明申请公开(公告)号：US20130069930A1
公开(公告)日：2013-03-21
申请号：US13635414
申请日：2010-10-29
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2310/0286 , G09G2310/0291 , G09G2310/08 , G09G2330/021 , G11C19/184 , G11C19/28
摘要： A bistable circuit includes an output terminal that outputs a state signal, an output terminal that outputs an other-stage control signal, a first node of which a potential is controlled based on a set signal and a clear signal, a thin-film transistor that provides a potential of a second clock to the output terminal when a potential of the first node is at a high level, a thin-film transistor that provides a potential of a first clock to the output terminal when a potential of the first node is at a high level, and a thin-film transistor for changing a potential of the other-stage control signal to a low level based on a reset signal. The first clock is generated by a power source of a different system from the second clock, and has a smaller amplitude than that of the second clock.
摘要翻译： 双稳态电路包括输出状态信号的输出端子，输出其他级控制信号的输出端子，基于设定信号和清零信号控制电位的第一节点;薄膜晶体管， 当第一节点的电位处于高电平时，向输出端提供第二时钟的电位;薄膜晶体管，当第一节点处于第一节点的电位时，向输出端提供第一时钟的电势 高电平的薄膜晶体管和用于根据复位信号将另一级控制信号的电位变为低电平的薄膜晶体管。 第一时钟由与第二时钟不同的系统的电源产生，并且具有比第二时钟的幅度更小的振幅。
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公开(公告)号：US20120087459A1
公开(公告)日：2012-04-12
申请号：US13376401
申请日：2010-02-24
IPC分类号： G11C19/00
CPC分类号： G11C19/184 , G09G3/3677 , G09G2310/0286 , G09G2320/029
摘要： To provide a shift register and a display device each capable of satisfactorily preventing noises of individual stage outputs without increasing circuit complexity, each stage of the shift register includes: a first output transistor; a first capacitor; an input gate; a first switching element; a second switching element; a third switching element; a fourth switching element; and a fifth switching element.
摘要翻译： 为了提供移位寄存器和显示装置，每个移位寄存器和显示装置能够令人满意地防止各级输出的噪声而不增加电路复杂度，移位寄存器的每一级包括：第一输出晶体管; 第一电容器; 输入门 第一开关元件; 第二开关元件; 第三开关元件; 第四开关元件; 和第五开关元件。
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公开(公告)号：US08922603B2
公开(公告)日：2014-12-30
申请号：US13574892
申请日：2010-12-07
CPC分类号： G09G3/3648 , G02F2201/52 , G09G3/3614 , G09G3/3677 , G09G2300/0452 , G09G2310/0202 , G09G2310/0205
摘要： A multi-primary color display device is capable of handling an increased number of primary colors for color image display with a reduced number of external parts, with reduced increase in the amount of drive circuit and reduced increase in operating speed. An active matrix liquid crystal panel includes a display section constituted by pixel formation portions, each made of four sub pixel-formation portions which handle four primary colors. These four sub pixel-formation portions are arranged in a 2×2 matrix pattern. With such a pixel configuration, a source driver drives as many as M source lines, which is two times the number M of pixels arranged in a horizontal direction. A gate driver is formed on the liquid crystal panel integrally with pixel circuit in the display section, and drives as many as N gate lines, which is two times the number N of the pixels arranged in a vertical direction.
摘要翻译： 多原色显示装置能够以减少的外部部件的数量来处理用于彩色图像显示的原色数量的增加，驱动电路的量的增加减少并且降低了操作速度的增加。 有源矩阵液晶面板包括由像素形成部分构成的显示部分，每个像素形成部分由处理四原色的四个子像素形成部分构成。 这四个子像素形成部分以2×2矩阵图案排列。 通过这样的像素配置，源驱动器驱动多达M个源线，其是沿水平方向排列的像素数M的两倍。 在液晶面板上与显示部分中的像素电路一体形成栅极驱动器，并且驱动与垂直方向排列的像素数N的两倍的N条栅极线。
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公开(公告)号：US20120293536A1
公开(公告)日：2012-11-22
申请号：US13574892
申请日：2010-12-07
IPC分类号： G09G5/02
CPC分类号： G09G3/3648 , G02F2201/52 , G09G3/3614 , G09G3/3677 , G09G2300/0452 , G09G2310/0202 , G09G2310/0205
摘要： An object of the present invention is to provide a multi-primary color display device which is capable of handling an increased number of primary colors for color image display with a reduced number of external parts, with reduced increase in the amount of drive circuit and reduced increase in operating speed. An active matrix liquid crystal panel (600) includes a display section (500) constituted by pixel formation portions, each made of four sub pixel-formation portions (Ps) which handle four primary colors. These four sub pixel-formation portions are arranged in a 2×2 matrix pattern. With such a pixel configuration, a source driver (300) drives as many as M source lines (Ls), which is two times the number Mpix of pixels arranged in a horizontal direction. A gate driver (400) is formed on the liquid crystal panel (600) integrally with pixel circuit in the display section (500), and drives as many as N gate lines (Lg), which is two times the number Npix of the pixels arranged in a vertical direction.
摘要翻译： 本发明的目的是提供一种多原色显示装置，其能够以较少数量的外部部件处理用于彩色图像显示的原色数量增加，同时减少驱动电路的数量的增加并减少 增加运行速度。 有源矩阵液晶面板（600）包括由像素形成部分构成的显示部分（500），每个像素形成部分由处理四原色的四个子像素形成部分（Ps）组成。 这四个子像素形成部分以2×2矩阵图案排列。 通过这样的像素配置，源极驱动器（300）驱动多达M个源极线（Ls）的数量，M个源极线（Ls）是沿水平方向布置的像素数量Mpix的两倍。 在液晶面板（600）上与显示部（500）中的像素电路一体形成栅极驱动器（400），并且驱动多达N个栅极线（Lg）的N个栅极线（Lg），其是像素的数量Npix的两倍 沿垂直方向排列。
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5.发明申请公开(公告)号：US20120146969A1
公开(公告)日：2012-06-14
申请号：US13391840
申请日：2010-03-16
IPC分类号： G09G5/00
CPC分类号： G02F1/13454 , G09G3/3266 , G09G2310/0286 , H01L27/124
摘要： A gate driver is implemented that includes an easily testable shift register to improve panel yields. In a monolithic gate driver including a shift register that operates based on 4-phase clock signals, each stage of the shift register is provided with an inter-stage connecting wiring line for receiving a clock signal other than clock signals received from a clock signal trunk wiring line, from a different stage than the stage; and a contact that connects a wiring line formed on the stage to the inter-stage connecting wiring line. The shift register is grouped every four consecutive stages. Markings formed of different numbers of planar-view circular-shaped structures are formed on bistable circuits of four stages included in each group such that the same type of marking appears every four stages.
摘要翻译： 实现了一个门驱动器，其包括一个易于测试的移位寄存器，以提高面板产量。 在包括基于4相时钟信号操作的移位寄存器的单片栅极驱动器中，移位寄存器的每一级设置有级间连接布线，用于接收除了从时钟信号中继线接收的时钟信号之外的时钟信号 布线，从舞台不同阶段; 以及将形成在载物台上的布线与台阶连接布线连接的接点。 移位寄存器每四个连续的阶段分组。 由不同数量的平面视图圆形结构形成的标记形成在每组包括的四个阶段的双稳态电路上，使得每四个阶段出现相同类型的标记。
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公开(公告)号：US20120076256A1
公开(公告)日：2012-03-29
申请号：US13376767
申请日：2010-02-22
IPC分类号： G11C19/00
CPC分类号： G09G3/3677 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： Disclosed are a shift register and a display device which can suppress noise of output of each stage without causing an increase in circuit scale. Each stage (Xi) of the shift register includes a first output transistor (M5), a second output transistor (M7), a first capacitor (C1), a second capacitor (C2), an input gate (M1), a first switching element (M2), a second switching element (M3), a third switching element (M4), a fourth switching element (M6), and a fifth switching element (M8).
摘要翻译： 公开了一种可以抑制每个级的输出噪声而不引起电路规模增加的移位寄存器和显示装置。 移位寄存器的每个级（Xi）包括第一输出晶体管（M5），第二输出晶体管（M7），第一电容器（C1），第二电容器（C2），输入栅极（M1） 元件（M2），第二开关元件（M3），第三开关元件（M4），第四开关元件（M6）和第五开关元件（M8）。
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公开(公告)号：US08731135B2
公开(公告)日：2014-05-20
申请号：US13575448
申请日：2010-11-11
IPC分类号： G11C19/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2310/0286 , G09G2310/0291 , G09G2320/0219 , G11C19/184 , G11C19/28
摘要： Each stage of a shift register includes: a shift pulse input terminal; a shift pulse output terminal; first to fifth terminals; an input gate, first to fourth switching elements; a first output transistor, and a first circuit, connected between a first output terminal and the second input terminal, which forms a current path between the first output terminal and the second input terminal.
摘要翻译： 移位寄存器的每个级包括：移位脉冲输入端; 移位脉冲输出端子; 第一至第五终端; 输入栅极，第一至第四开关元件; 第一输出晶体管和第一电路，连接在第一输出端子和第二输入端子之间，其形成第一输出端子和第二输入端子之间的电流路径。
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公开(公告)号：US08422622B2
公开(公告)日：2013-04-16
申请号：US13376401
申请日：2010-02-24
IPC分类号： G11C19/00
CPC分类号： G11C19/184 , G09G3/3677 , G09G2310/0286 , G09G2320/029
摘要： To provide a shift register and a display device each capable of satisfactorily preventing noises of individual stage outputs without increasing circuit complexity, each stage of the shift register includes: a first output transistor; a first capacitor; an input gate; a first switching element; a second switching element; a third switching element; a fourth switching element; and a fifth switching element.
摘要翻译： 为了提供移位寄存器和显示装置，每个移位寄存器和显示装置能够令人满意地防止各级输出的噪声而不增加电路复杂度，移位寄存器的每一级包括：第一输出晶体管; 第一电容器; 输入门 第一开关元件; 第二开关元件; 第三开关元件; 第四开关元件; 和第五开关元件。
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公开(公告)号：US09281077B2
公开(公告)日：2016-03-08
申请号：US13202950
申请日：2009-10-23
CPC分类号： G11C19/28 , G09G3/3674
摘要： A shift register includes series-connection circuits to transmit a shift pulse. The series-connection circuits include a continuous stage group with continuous stages. Each stage of the continuous stage group includes a first output transistor, a first capacitor, an input gate, a first switching element, a second switching element, a third switching element, and a fourth switching element.
摘要翻译： 移位寄存器包括用于发送移位脉冲的串联电路。 串联电路包括具有连续级的连续级组。 连续级组的各级包括第一输出晶体管，第一电容器，输入栅极，第一开关元件，第二开关元件，第三开关元件和第四开关元件。
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公开(公告)号：US08384461B2
公开(公告)日：2013-02-26
申请号：US13376767
申请日：2010-02-22
IPC分类号： H03K23/00
CPC分类号： G09G3/3677 , G09G2310/0286 , G11C19/184 , G11C19/28
摘要： Disclosed are a shift register and a display device which can suppress noise of output of each stage without causing an increase in circuit scale. In at least one example embodiment, each stage of the shift register includes a first output transistor, a second output transistor, a first capacitor, a second capacitor, an input gate, a first switching element, a second switching element, a third switching element, a fourth switching element, and a fifth switching element.
摘要翻译： 公开了一种可以抑制每个级的输出噪声而不引起电路规模增加的移位寄存器和显示装置。 在至少一个示例性实施例中，移位寄存器的每一级包括第一输出晶体管，第二输出晶体管，第一电容器，第二电容器，输入栅极，第一开关元件，第二开关元件，第三开关元件 ，第四开关元件和第五开关元件。
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