Semiconductor Device and Method of Making Same
    1.
    发明申请
    Semiconductor Device and Method of Making Same 有权
    半导体器件及其制作方法

    公开(公告)号:US20090023253A1

    公开(公告)日:2009-01-22

    申请号:US12204502

    申请日:2008-09-04

    IPC分类号: H01L21/56

    摘要: A method for manufacturing a semiconductor device that includes a housing, formed of a polyamide-series thermoplastic resin, and a semiconductor package sealed in the housing, which is formed of a thermosetting epoxy resin. The surface of the package is modified by UV-irradiation to have adhesive properties to polyamide. A plurality of connector terminals extend from the package and housing in parallel. A portion of the terminals is also sealed in the housing together with the package. Thus, the device is easily produced by insert molding and has excellent moisture resistance.

    摘要翻译: 一种半导体器件的制造方法,其包括由聚酰胺系热塑性树脂形成的壳体和密封在壳体中的由热固性环氧树脂形成的半导体封装体。 通过UV照射改变包装的表面以具有对聚酰胺的粘合性能。 多个连接器端子从封装和外壳平行延伸。 端子的一部分也与封装件一起被密封在壳体中。 因此,通过嵌件成型容易地制造该装置,并且具有优异的耐湿性。

    Method of making semiconductor device
    2.
    发明授权
    Method of making semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US07588962B2

    公开(公告)日:2009-09-15

    申请号:US12204502

    申请日:2008-09-04

    IPC分类号: H01L21/50

    摘要: A method for manufacturing a semiconductor device that includes a housing, formed of a polyamide-series thermoplastic resin, and a semiconductor package sealed in the housing, which is formed of a thermosetting epoxy resin. The surface of the package is modified by UV-irradiation to have adhesive properties to polyamide. A plurality of connector terminals extend from the package and housing in parallel. A portion of the terminals is also sealed in the housing together with the package. Thus, the device is easily produced by insert molding and has excellent moisture resistance.

    摘要翻译: 一种半导体器件的制造方法,其包括由聚酰胺系热塑性树脂形成的壳体和密封在壳体中的由热固性环氧树脂形成的半导体封装体。 通过UV照射改变包装的表面以具有对聚酰胺的粘合性能。 多个连接器端子从封装和外壳平行延伸。 端子的一部分也与封装件一起被密封在壳体中。 因此,通过嵌件成型容易地制造该装置,并且具有优异的耐湿性。

    Field effect transistor with high withstand voltage and low resistance
    3.
    发明授权
    Field effect transistor with high withstand voltage and low resistance 有权
    具有高耐压和低电阻的场效应晶体管

    公开(公告)号:US06635926B2

    公开(公告)日:2003-10-21

    申请号:US09908540

    申请日:2001-07-20

    IPC分类号: H01L2978

    摘要: A field effect transistor with a high withstand voltage and a low resistance is provided. A ring-shaped channel region is disposed inside a source region formed in a ring, and the inside of the channel region is taken as a drain region. A depletion layer extends toward the inside of the drain region, resulting in a high withstand voltage. In the portion, except the portion within a prescribed distance from the corner portion of the channel region, a low resistance conductive layer is disposed, thereby resulting in high withstand voltage.

    摘要翻译: 提供具有高耐受电压和低电阻的场效应晶体管。 环形沟道区域设置在形成在环中的源极区域内,并且沟道区域的内部被作为漏极区域。 耗尽层朝向漏极区域的内部延伸,导致高的耐受电压。 在该部分中,除了距通道区域的角部规定距离内的部分,设置低电阻导电层,从而导致高耐压。