公开(公告)号：US5032838A

公开(公告)日：1991-07-16

申请号：US428287

申请日：1989-10-26

申请人： Masayoshi Murayama ,  Fumitaka Sato ,  Kensuke Adachi ,  Shigekazu Sumita

发明人： Masayoshi Murayama ,  Fumitaka Sato ,  Kensuke Adachi ,  Shigekazu Sumita

IPC分类号： H03M7/40 ,  H03M7/42

CPC分类号： H03M7/425

摘要： When a variable length code requires two cycles in decoding, portions of code bit strings serving as objects to be decoded in first and second cycles of the variable length code are caused to overlap each other. In the first cycle, a non-overlapping portion is determined as a decoded portion. A length of a code bit string actually decoded in the first cycle is determined as a length of the code bit string serving as the object to be decoded in the first cycle excluding the length of the overlapping portion so as to determine a start position of the code bit string serving as the object to be decoded in the second cycle.

摘要翻译： 当可变长度代码在解码中需要两个周期时，引起用作可变长度码的第一和第二周期中要解码的对象的码位串的部分彼此重叠。 在第一周期中，将非重叠部分确定为解码部分。 在第一周期中实际解码的码位串的长度被确定为用作除了重叠部分的长度之外的第一周期中要解码的对象的码位串的长度，以便确定 用作第二周期中要解码的对象的码位串。

公开(公告)号：US4760459A

公开(公告)日：1988-07-26

申请号：US18281

申请日：1987-02-24

申请人： Fumitaka Sato ,  Shigekazu Sumita ,  Masayoshi Murayama ,  Hiromichi Tome

发明人： Fumitaka Sato ,  Shigekazu Sumita ,  Masayoshi Murayama ,  Hiromichi Tome

IPC分类号： G06T9/00 ,  H04N1/417 ,  H04N1/413

CPC分类号： H04N1/4175 ,  G06T9/005

摘要： According to a binary data expansion processing apparatus of this invention, unicolor image data is generated in a generation section in accordance with data associated with a run length and a color instruction for designating the color of image data to be generated. Unicolor image data exceeding the generated set is combined following the already-generated image data portion in accordance with a point a0, thus generating image data for a byte block of interest. At the same time, a color change point on a reference line corresponding to the byte block of interest is detected by a b1 detector. It is checked from the detected color change point if the combined image data exceeds a byte length. If the combined image data exceeds the byte length, the combined image data for one byte of the combined image data is output to an external device.

摘要翻译： 根据本发明的二进制数据扩展处理装置，根据与游程长度相关联的数据和用于指定要生成的图像数据的颜色的颜色指示，在生成部分中生成单色图像数据。 超过生成集合的单色图像数据根据点a0在已经生成的图像数据部分之后被组合，从而生成用于感兴趣的字节块的图像数据。 同时，由b1检测器检测与感兴趣的字节块相对应的参考线上的颜色变化点。 如果组合的图像数据超过字节长度，则从检测到的颜色变化点检查。 如果组合图像数据超过字节长度，则将组合图像数据的一个字节的组合图像数据输出到外部设备。

公开(公告)号：US5623556A

公开(公告)日：1997-04-22

申请号：US368719

申请日：1995-01-04

申请人： Masayoshi Murayama ,  Shigehiro Kajihara ,  Fumitaka Sato

发明人： Masayoshi Murayama ,  Shigehiro Kajihara ,  Fumitaka Sato

IPC分类号： G06T9/00

CPC分类号： G06T9/00

摘要： For each of multiple segments acquired by dividing a binary image by a predetermined under of lines, image data of a reference line corresponding to a start line of that segment is stored in an intermediate start table in association with data indicating a head coding position of the start line in code data acquired when the binary image is compressed. Based on the stored data, partial image extraction is executed.

摘要翻译： 对于通过将二进制图像除以预定的下划线而获得的多个段中的每一个，与该段的起始行相对应的参考线的图像数据与表示该位置的头编码位置的数据相关联地存储在中间起始表中 当二进制图像被压缩时获取的代码数据中的起始行。 基于存储的数据，执行部分图像提取。

公开(公告)号：US5204760A

公开(公告)日：1993-04-20

申请号：US749531

申请日：1991-08-26

申请人： Masayoshi Murayama ,  Fumitaka Sato

发明人： Masayoshi Murayama ,  Fumitaka Sato

IPC分类号： H04N1/405

CPC分类号： H04N1/4053

摘要： In processing of a minimizer average error method (or an error diffusion method), a threshold value for determining whether a point (pixel) as an object to be processed is a black or white dot is changed in accordance with the pixel position using a threshold value matrix having a two-dimensional repetitive pattern. When a one-dot size in an output apparatus which can only perform binary expression in units of pixels is larger than a logical size, a continuous tone image is converted into a pseudo half tone image in consideration of an increase in size of a dot into other dots (projecting portions).

摘要翻译： 在最小化平均误差法（或误差扩散法）的处理中，根据使用阈值的像素位置来改变用于确定作为被处理对象的点（像素）是黑色还是白色点的阈值 值矩阵具有二维重复图案。 当只能以像素为单位执行二进制表达式的输出装置中的单点大小大于逻辑大小时，考虑到点的大小的增加将连续色调图像转换成伪半色调图像 其他点（突出部分）。

公开(公告)号：US5202844A

公开(公告)日：1993-04-13

申请号：US702810

申请日：1991-05-21

申请人： Shizuo Kamio ,  Fumitaka Sato ,  Shimpei Kunii ,  Masayoshi Murayama

发明人： Shizuo Kamio ,  Fumitaka Sato ,  Shimpei Kunii ,  Masayoshi Murayama

IPC分类号： G06F1/16

CPC分类号： G06F1/1677 ,  G06F1/1616 ,  G06F2200/1614

摘要： An information processing apparatus includes a hinge mechanism for rotating an integral type hand writing input/display device and a keyboard from a position, in which the display surface of the integral type hand writing input/display device and the surface of the keyboard face each other, to a position of a desired opening angle. The input/display device is provided on a top portion of a processing apparatus body, is constituted by integrally superposing a tablet device for coordinate input on a display surface of a display device, and inputs coordinate data representing a location indicated voluntarily on the tablet device. The hinge mechanism can retain the desired opening angle. There are further provided an attitude sensor for detecting which of the integral type hand write input/display device and the keyboard is situated substantially horizontally, and a changing circuit for changing the display contents of the integral type hand write input/display device and coordinate data detection location, in accordance with the ON/OFF state of the attitude sensor.

公开(公告)号：US08380897B2

公开(公告)日：2013-02-19

申请号：US13486661

申请日：2012-06-01

申请人： Masayoshi Murayama

发明人： Masayoshi Murayama

IPC分类号： G06F3/00

CPC分类号： G06F13/385 ,  Y02D10/14 ,  Y02D10/151

摘要： According to one embodiment, the host controller includes a transmission circuit that encodes transmission data, according to a serial transfer format, a reception circuit that decodes received data, according to the serial transfer format, a variable frequency clock generator that generates a card clock and a transfer clock, a card clock output unit that outputs the card clock to the memory card, an interface unit that includes both a transmission interface that transfers the transmission data from the transmission circuit to the memory card in synchronization with the transfer clock and a reception interface that transfers received data from the memory card to the reception circuit in synchronization with the transfer clock, and a setting register circuit that holds setting information for an input/output method of the memory card, and controls frequency of the transfer clock generated by the variable frequency clock generator, based on the setting information.

摘要翻译： 根据一个实施例，主机控制器包括：传输电路，根据串行传输格式，根据串行传输格式对接收数据进行解码的接收电路，产生卡时钟的可变频率时钟发生器，以及 传送时钟，将卡时钟输出到存储卡的卡时钟输出单元，包括传输接口的接口单元，传输接口与传送时钟同步地将传输数据从传输电路传送到存储卡，接收 接口，其将接收到的数据从存储卡传送到与传送时钟同步的接收电路;以及设置寄存器电路，其保存用于存储卡的输入/输出方法的设置信息，并且控制由存储卡生成的传送时钟的频率 可变频时钟发生器，根据设定信息。

公开(公告)号：US20120054531A1

公开(公告)日：2012-03-01

申请号：US13075309

申请日：2011-03-30

申请人： Masayoshi Murayama

发明人： Masayoshi Murayama

IPC分类号： G06F1/04

CPC分类号： H03L7/081 ,  G06F2213/0038

摘要： According to one embodiment, there is provided a host controller, which samples reception data in a VDS mode and an FDS mode, includes a VDS phase register which holds a phase shift amount in the VDS mode, an FDS phase register which holds a phase shift amount in the FDS mode, a mode setting unit configured to indicate in which of the VDS mode and the FDS mode data is sampled, a sampling position setting unit which selects the phase shift amount set in one of the VDS and the FDS phase register in accordance with a setting value of the mode setting unit, and provides the selected phase shift amount as a sampling position, and a clock phase shift unit which shifts a phase of an input clock signal in accordance with the shift amount, and provides the shifted input clock signal as a sampling clock.

摘要翻译： 根据一个实施例，提供了以VDS模式和FDS模式对接收数据进行采样的主机控制器，包括保持VDS模式中的相移量的VDS相位寄存器，保持相移的FDS相位寄存器 FDS模式中的相位偏移量被设定为在VDS模式和FDS模式数据中的哪一个被采样的模式设定单元， 根据模式设定单元的设定值，提供所选择的相移量作为采样位置，以及时钟相移单元，其根据移位量移位输入时钟信号的相位，并提供偏移输入 时钟信号作为采样时钟。

公开(公告)号：US20050235313A1

公开(公告)日：2005-10-20

申请号：US11092990

申请日：2005-03-30

申请人： Akihito Yamada ,  Masayoshi Murayama ,  Hiroshi Kida ,  Nozomu Kikuchi ,  Hideyuki Uchiyama ,  Takanori Harada

发明人： Akihito Yamada ,  Masayoshi Murayama ,  Hiroshi Kida ,  Nozomu Kikuchi ,  Hideyuki Uchiyama ,  Takanori Harada

IPC分类号： H04N5/445 ,  H04N5/50 ,  H04N7/025 ,  H04N7/03 ,  H04N7/035

CPC分类号： H04N5/44543 ,  H04N7/16 ,  H04N21/4383 ,  H04N21/44222 ,  H04N21/4432 ,  H04N21/4532 ,  H04N21/4821 ,  H04N21/84

摘要： A program information acquisition apparatus includes a program information acquisition unit, a program information accumulation unit, and a program information acquisition determining unit. In this configuration, a start of an acquisition operation by the program information acquisition unit is determined based on an information accumulation status of the program information accumulation unit. Thus, program information distributed from a desired reception target can be accumulated as the latest information as much as possible. Since unneeded program information is not acquired, program information acquisition with high energy saving effects is made possible.

摘要翻译： 节目信息获取装置包括节目信息获取单元，节目信息存储单元和节目信息获取确定单元。 在该配置中，基于节目信息聚积单元的信息累积状态来确定节目信息获取单元的获取操作的开始。 因此，可以尽可能多地累积从期望的接收目标分发的节目信息作为最新信息。 由于不获取不需要的节目信息，所以能够节省高节能效果的节目信息获取成为可能。

公开(公告)号：US5591870A

公开(公告)日：1997-01-07

申请号：US480916

申请日：1995-06-07

申请人： Masakatsu Hatano ,  Masayoshi Murayama ,  Kenji Shima ,  Masumi Ito

发明人： Masakatsu Hatano ,  Masayoshi Murayama ,  Kenji Shima ,  Masumi Ito

IPC分类号： B01J23/22 ,  B01J27/198 ,  C07C51/215 ,  C07C57/05

CPC分类号： C07C51/215 ,  B01J23/002 ,  B01J23/22 ,  B01J27/198 ,  B01J2523/00

摘要： A process for producing a vanadium-phosphorus oxide-containing catalyst precursor, which comprises (a) introducing into an organic solvent a vanadium alkoxide as a pentavalent vanadium compound and a phosphorus compound in the presence of a reducing agent capable of reducing the pentavalent vanadium compound to a tetravalent state, (b) hydrolyzing at least a part of the vanadium alkoxide before or after the introduction of the phosphorus compound, and (c) heating the vanadium-containing liquid medium obtained in step (b), in the presence of the phosphorus compound to reduce at least a part of vanadium to a tetravalent state.

摘要翻译： 一种含钒 - 氧化磷的催化剂前体的制备方法，其包括（a）在能够还原五价钒化合物的还原剂的存在下将有机溶剂中的钒醇盐作为五价钒化合物和磷化合物引入 （b）在引入磷化合物之前或之后水解至少一部分钒醇盐，和（c）在步骤（b）中获得的含钒液体介质中，在 磷化合物以将至少一部分钒还原成四价态。

公开(公告)号：US08214563B2

公开(公告)日：2012-07-03

申请号：US12823632

申请日：2010-06-25

申请人： Masayoshi Murayama

发明人： Masayoshi Murayama

IPC分类号： G06F3/00

CPC分类号： G06F13/385 ,  Y02D10/14 ,  Y02D10/151

摘要： According to one embodiment, the host controller includes a transmission circuit that encodes transmission data, according to a serial transfer format, a reception circuit that decodes received data, according to the serial transfer format, a variable frequency clock generator that generates a card clock and a transfer clock, a card clock output unit that outputs the card clock to the memory card, an interface unit includes a transmission interface that transfers the transmission data from the transmission circuit to the memory card in synchronization with the transfer clock, and a reception interface that transfers received data from the memory card to the reception circuit in synchronization with the transfer clock, and a setting register circuit that holds setting information concerning an input/output method of the memory card, and controls frequency of the transfer clock generated by the variable frequency clock generator, based on the setting information.

摘要翻译： 根据一个实施例，主机控制器包括：传输电路，根据串行传输格式，根据串行传输格式对接收数据进行解码的接收电路，产生卡时钟的可变频率时钟发生器，以及 传输时钟，将时钟输出到存储卡的卡时钟输出单元，接口单元包括传输接口，该传输接口与传输时钟同步地将传输数据从传输电路传送到存储卡;接收接口 其将接收到的数据从存储卡传送到与传送时钟同步的接收电路，以及设置寄存器电路，其保存关于存储卡的输入/输出方法的设置信息，并且控制由变量产生的传送时钟的频率 频率时钟发生器，基于设置信息。