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公开(公告)号：US20080012630A1
公开(公告)日：2008-01-17
申请号：US11773996
申请日：2007-07-06
IPC分类号： G05F3/02
CPC分类号： G05F3/262
摘要： A semiconductor device including a plurality of current mirror circuits is disclosed. The current mirror circuits having reference input terminals and output terminals respectively. Each of the reference input terminals is provided with a current having a different current value. Each of the output terminals of the current mirror circuits are connected to a current output terminal. The output currents of the current mirror circuits are controlled by a control circuit.
摘要翻译： 公开了一种包括多个电流镜电路的半导体器件。 电流镜电路分别具有参考输入端和输出端。 每个参考输入端子具有不同电流值的电流。 电流镜电路的每个输出端连接到电流输出端。 电流镜电路的输出电流由控制电路控制。
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公开(公告)号：US07468625B2
公开(公告)日：2008-12-23
申请号：US11773996
申请日：2007-07-06
IPC分类号： G05F1/10
CPC分类号： G05F3/262
摘要： A semiconductor device including a plurality of current mirror circuits is disclosed. The current mirror circuits having reference input terminals and output terminals respectively. Each of the reference input terminals is provided with a current having a different current value. Each of the output terminals of the current mirror circuits are connected to a current output terminal. The output currents of the current mirror circuits are controlled by a control circuit.
摘要翻译： 公开了一种包括多个电流镜电路的半导体器件。 电流镜电路分别具有参考输入端和输出端。 每个参考输入端子具有不同电流值的电流。 电流镜电路的每个输出端连接到电流输出端。 电流镜电路的输出电流由控制电路控制。
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公开(公告)号：US07248100B2
公开(公告)日：2007-07-24
申请号：US11171316
申请日：2005-07-01
IPC分类号： G05F1/10
CPC分类号： G05F3/262
摘要： A semiconductor device including a plurality of current mirror circuits is disclosed. The current mirror circuits having reference input terminals and output terminals respectively. Each of the reference input terminals is provided with a current having a different current value. Each of the output terminals of the current mirror circuits are connected to a current output terminal. The output currents of the current mirror circuits are controlled by a control circuit.
摘要翻译： 公开了一种包括多个电流镜电路的半导体器件。 电流镜电路分别具有参考输入端和输出端。 每个参考输入端子具有不同电流值的电流。 电流镜电路的每个输出端连接到电流输出端。 电流镜电路的输出电流由控制电路控制。
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公开(公告)号：US06466503B2
公开(公告)日：2002-10-15
申请号：US09949652
申请日：2001-09-12
IPC分类号： G11C706
CPC分类号： G11C17/12
摘要： A semiconductor memory has paired first and second bit lines one of which passes a current representing data stored in a selected memory cell. If the first bit line transfers the current representing the data stored in the memory cell, the second bit line transfers a current representing data stored in a dummy cell. If the second bit line transfers the current representing the data stored in the memory cell, the first bit line transfers the current representing the data stored in the dummy cell. The current transferred through the first bit line is divided into partial currents, and the current transferred through the second bit line is also divided into partial currents. It is determined whether or not the current representing the data stored in the memory cell is passed through the first bit line. If it is determined that the first bit line passes the current representing the data stored in the memory cell, the partial currents from the first bit line are recombined to provide an output and one of the partial currents from the second bit line is selected to provide another output. If it is determined that the first bit line does not pass the current representing the data stored in the memory cell, i.e., the first bit line passes the current representing the data stored in the dummy cell, the partial currents from the second bit line are recombined to provide an output and one of the partial currents from the first bit line is selected to provide another output.
摘要翻译： 半导体存储器配对第一和第二位线，其中一个通过表示存储在所选存储单元中的数据的电流。 如果第一位线传送表示存储在存储单元中的数据的电流，则第二位线传送表示存储在虚拟单元中的数据的电流。 如果第二位线传送表示存储在存储单元中的数据的电流，则第一位线传送表示存储在虚拟单元中的数据的电流。 通过第一位线传输的电流被分成部分电流，并且通过第二位线传输的电流也被分为部分电流。 确定表示存储在存储单元中的数据的电流是否通过第一位线。 如果确定第一位线通过表示存储在存储单元中的数据的电流，则来自第一位线的部分电流被重组以提供输出，并且选择来自第二位线的部分电流中的一个以提供 另一个输出。 如果确定第一位线未通过表示存储在存储单元中的数据的电流，即，第一位线通过表示存储在虚拟单元中的数据的电流，则来自第二位线的部分电流为 重新组合以提供输出，并且选择来自第一位线的部分电流中的一个以提供另一输出。
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公开(公告)号：US20060001481A1
公开(公告)日：2006-01-05
申请号：US11171316
申请日：2005-07-01
IPC分类号： H03B1/00
CPC分类号： G05F3/262
摘要： A semiconductor device including a plurality of current mirror circuits is disclosed. The current mirror circuits having reference input terminals and output terminals respectively. Each of the reference input terminals is provided with a current having a different current value. Each of the output terminals of the current mirror circuits are connected to a current output terminal. The output currents of the current mirror circuits are controlled by a control circuit.
摘要翻译： 公开了一种包括多个电流镜电路的半导体器件。 电流镜电路分别具有参考输入端和输出端。 每个参考输入端子具有不同电流值的电流。 电流镜电路的每个输出端连接到电流输出端。 电流镜电路的输出电流由控制电路控制。
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公开(公告)号：US07391263B2
公开(公告)日：2008-06-24
申请号：US11511333
申请日：2006-08-29
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F2200/453 , H03F2200/78 , H03F2203/45366 , H03F2203/45454 , H03F2203/45466 , H03F2203/45484 , H03F2203/45702
摘要： An operational amplifier 1 is provided with differential amplifier 2, replica amplifier 3, voltage-current converting circuit 4, reference current source 5 and comparator 6. Differential amplifier 2 includes P-channel MOS transistors PT1 and PT2, gate and drain electrodes of which are connected to each other to function as loads, and N-channel MOS transistors NT1, NT2 and NT3. Replica amplifier 3 is identical in structure to differential amplifier and also includes P-channel MOS transistors PT11 and PT12, gate and drain electrodes of which are connected to each other to function as loads, and N-channel MOS transistors NT11, NT12 and NT13. Voltage-current converting circuit 4 converts output voltages of replica amplifier 3 to current Irep. Comparator 6 compares output current Irep of voltage-current converting circuit 4 with reference current Iref of reference current source 5 and supplies compared current Ico to differential amplifier 2 to keep bias current Ibias of differential amplifier 2 constant.
摘要翻译： 运算放大器1设置有差分放大器2，复制放大器3，电压电流转换电路4，参考电流源5和比较器6。 差分放大器2包括P沟道MOS晶体管PT 1和PT 2，栅极和漏极彼此连接起来用作负载，N沟道MOS晶体管NT1，NT2和NT3。 复制放大器3在结构上与差分放大器相同，并且还包括P沟道MOS晶体管PT 11和PT 12，栅极和漏极彼此连接以用作负载，并且N沟道MOS晶体管NT 11，NT 12和NT 13。 电压电流转换电路4将复制放大器3的输出电压转换为电流Irep。 比较器6将电压 - 电流转换电路4的输出电流Irep与参考电流源5的参考电流Iref进行比较，并将比较电流Ico提供给差分放大器2，以保持差分放大器2的偏置电流Ibias恒定。
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公开(公告)号：US20070057724A1
公开(公告)日：2007-03-15
申请号：US11511333
申请日：2006-08-29
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F2200/453 , H03F2200/78 , H03F2203/45366 , H03F2203/45454 , H03F2203/45466 , H03F2203/45484 , H03F2203/45702
摘要： An operational amplifier 1 is provided with differential amplifier 2, replica amplifier 3, voltage-current converting circuit 4, reference current source 5 and comparator 6. Differential amplifier 2 includes P-channel MOS transistors PT1 and PT2, gate and drain electrodes of which are connected to each other to function as loads, and N-channel MOS transistors NT1, NT2 and NT3. Replica amplifier 3 is identical in structure to differential amplifier and also includes P-channel MOS transistors PT11 and PT12, gate and drain electrodes of which are connected to each other to function as loads, and N-channel MOS transistors NT11, NT12 and NT13. Voltage-current converting circuit 4 converts output voltages of replica amplifier 3 to current Irep. Comparator 6 compares output current Irep of voltage-current converting circuit 4 with reference current Iref of reference current source 5 and supplies compared current Ico to differential amplifier 2 to keep bias current Ibias of differential amplifier 2 constant.
摘要翻译： 运算放大器1设置有差分放大器2，复制放大器3，电压电流转换电路4，参考电流源5和比较器6。 差分放大器2包括P沟道MOS晶体管PT 1和PT 2，栅极和漏极彼此连接起来用作负载，N沟道MOS晶体管NT1，NT2和NT3。 复制放大器3在结构上与差分放大器相同，并且还包括P沟道MOS晶体管PT 11和PT 12，栅极和漏极彼此连接以用作负载，并且N沟道MOS晶体管NT 11，NT 12和NT 13。 电压电流转换电路4将复制放大器3的输出电压转换为电流Irep。 比较器6将电压 - 电流转换电路4的输出电流Irep与参考电流源5的参考电流Iref进行比较，并将比较电流Ico提供给差分放大器2，以保持差分放大器2的偏置电流Ibias恒定。
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