公开(公告)号：US07729682B2

公开(公告)日：2010-06-01

申请号：US11237339

申请日：2005-09-28

Applicant: Thomas Glen Ragan ,  Matthew D. Felder ,  Michael R. May

Inventor： Thomas Glen Ragan ,  Matthew D. Felder ,  Michael R. May

IPC: H04B1/26

CPC classification number: H04B1/28

Abstract: A receiver includes a mixing module for mixing an input signal by at least one mixing sequence to produce a mixed signal. The mixed signal is filtered to produce a first filtered signal. A first downsampler downsamples the first filtered signal to produce a first decimated signal, wherein the decimation period is not a multiple of the mixing period.

Abstract translation: 接收机包括混合模块，用于通过至少一个混合序列混合输入信号以产生混合信号。 对混合信号进行滤波以产生第一滤波信号。 第一下采样器对第一滤波信号进行下采样以产生第一抽取信号，其中抽取周期不是混合周期的倍数。

公开(公告)号：US07706473B2

公开(公告)日：2010-04-27

申请号：US11388675

申请日：2006-03-24

Applicant: Matthew D. Felder ,  Michael R. May

Inventor： Matthew D. Felder ,  Michael R. May

IPC: H04L25/06

CPC classification number: H04L27/14 ,  H03F3/189 ,  H03F3/343 ,  H03G3/3068

Abstract: A method for signal strength detection begins by comparing a signal strength representation of a signal with a signal strength representation of a reference signal. The method continues by adjusting, when the signal strength representation of the signal compares unfavorably with the signal strength representation of the reference signal, at least one of the signal strength representation of the signal and the signal strength representation of the reference signal until the signal strength representation of the signal compares favorably with the signal strength representation of the reference signal. The method continues by determining signal strength of the signal based on the adjusting of the signal strength representation of the signal and signal strength of the reference signal.

Abstract translation: 用于信号强度检测的方法开始于将信号的信号强度表示与参考信号的信号强度表示进行比较。 该方法通过调节信号的信号强度表示与参考信号的信号强度表示不利地相比较，信号的信号强度表示和参考信号的信号强度表示中的至少一个直到信号强度 信号的表示与参考信号的信号强度表示相当。 该方法通过基于信号的信号强度表示和参考信号的信号强度的调整来确定信号的信号强度来继续。

公开(公告)号：US20090086104A1

公开(公告)日：2009-04-02

申请号：US11863662

申请日：2007-09-28

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H04N5/268 ,  G06F13/00 ,  H03M1/12

CPC classification number: H04N5/268 ,  H04N5/765 ,  H04N5/775 ,  H04N9/8042

Abstract: In a multimedia SOC that includes a plurality of jack sense modules coupled to the plurality of video output pins, a processing module functions to: enable one or more of the plurality of jack sense modules to determine a video connection to the SOC, enable a video decoder in a first mode when the video connection is of a first type, and enable the video decoder in a second mode when the video connection is of a second type

Abstract translation: 在包括耦合到多个视频输出引脚的多个插孔感测模块的多媒体SOC中，处理模块用于：使得多个插孔感测模块中的一个或多个能够确定到SOC的视频连接，使视频 当视频连接是第一类型时，以第一模式解码器，并且当视频连接是第二类型时，以第二模式启用视频解码器

公开(公告)号：US07106241B1

公开(公告)日：2006-09-12

申请号：US11237340

申请日：2005-09-28

Applicant: Matthew D. Felder ,  Michael R. May

Inventor： Matthew D. Felder ,  Michael R. May

IPC: H03M1/12

CPC classification number: H03M3/35 ,  H03M3/496

Abstract: A controlled sampling module samples an input signal from an input device and a reference signal. The controlled sampling module includes a plurality of sample capacitors, a switching network, and a switch control module for controlling the switching network. The switching network couples a first capacitor of the plurality of capacitors to the reference signal during a first phase, and to the input signal during a second phase, such that a charge on the first capacitor remaining at an end of the first phase is cancelled during the second phase.

Abstract translation: 受控采样模块从输入设备和参考信号采样输入信号。 受控采样模块包括多个采样电容器，开关网络和用于控制开关网络的开关控制模块。 开关网络在第一阶段期间将多个电容器中的第一电容器耦合到参考信号，并且在第二阶段期间耦合到输入信号，使得在第一阶段结束时剩余的第一电容器上的电荷被消除 第二阶段

公开(公告)号：US07104684B2

公开(公告)日：2006-09-12

申请号：US10718769

申请日：2003-11-22

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: G01K7/01 ,  G01K7/16

CPC classification number: G01K7/22 ,  G01K2219/00

Abstract: A system and method for sensing the temperature of a device. This includes the establishment of a programmable current from an on-chip source, which in turn is used to produce a temperature dependent voltage from a temperature dependent resistive device. The temperature dependent resistive device is thermally coupled to a device for which the temperature is to be sensed. The temperature dependent voltage produced is converted to a digital value and equated to the temperature of the device.

Abstract translation: 一种用于感测设备温度的系统和方法。 这包括建立来自片上源的可编程电流，其依次用于从温度依赖性电阻器件产生与温度相关的电压。 温度依赖电阻器件热耦合到要感测温度的器件。 产生的与温度有关的电压转换为数字值，并等于器件的温度。

公开(公告)号：US06373277B1

公开(公告)日：2002-04-16

申请号：US09790282

申请日：2001-02-22

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H03K1716

CPC classification number: H04L25/028 ,  H04L25/0272 ,  H04L25/0276 ,  H04L25/0278

Abstract: A line driver having variable impedance termination includes an impedance, a 1st variable feedback, a 2nd variable feedback, a summing module and a gain module. The 1st and 2nd variable feedbacks provide feedback based on the desired impedance for the particular application. The summing module is operably coupled to sum the 1st variable feedback, the 2nd variable feedback and a signal to produce a resultant signal. The gain module is operably coupled to receive the resultant signal and to amplify the signal to produce a gained signal. The output of the gain module is operably coupled to the impedance wherein the other node of the impedance provides the output of the line driver. To provide the feedback, the 1st variable feedback is operably coupled to the output of the gain module and the summing module and the 2nd variable feedback is operably coupled to the output of the line driver and the summing module.

Abstract translation: 具有可变阻抗终端的线路驱动器包括阻抗，第一可变反馈，第二可变反馈，求和模块和增益模块。 第一和第二可变反馈基于特定应用的期望阻抗提供反馈。 求和模块可操作地耦合以将第一可变反馈，第二可变反馈和信号相加以产生结果信号。 增益模块可操作地耦合以接收所得到的信号并放大信号以产生增益信号。 增益模块的输出可操作地耦合到阻抗，其中阻抗的另一个节点提供线路驱动器的输出。 为了提供反馈，第一可变反馈可操作地耦合到增益模块的输出，并且求和模块和第二可变反馈可操作地耦合到线路驱动器和求和模块的输出。

公开(公告)号：US08861749B2

公开(公告)日：2014-10-14

申请号：US13114655

申请日：2011-05-24

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H03F21/00 ,  H04H60/04 ,  G06F3/16 ,  G10L21/0208 ,  H04B1/10

CPC classification number: H04H60/04 ,  G06F3/162 ,  G10L21/0208 ,  H04B1/1036

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract translation: 音频输出电路包括片上左声道放大器模块，片上中心声道放大器模块和片上右声道放大器模块。 左通道IC引脚可操作地耦合到片上左声道放大器模块的输出。 右通道IC引脚可操作地耦合到片上右声道放大器模块的输出。 中心通道IC引脚可操作地耦合到片上中心通道放大器模块的输出端。 中心通道反馈IC引脚可操作地耦合到片上中心通道放大器模块的输入端以提供反馈回路。 左插孔连接可操作地耦合到左通道IC引脚。 右插孔连接可操作地耦合到右通道IC引脚。 耦合到中心反馈IC引脚的插座返回连接。 电感器具有耦合到插座返回连接的第一节点和耦合到中心通道IC引脚的第二节点。

公开(公告)号：US20110222712A1

公开(公告)日：2011-09-15

申请号：US13114655

申请日：2011-05-24

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H03F99/00 ,  H03G3/00 ,  H03F1/56 ,  H03G3/20

CPC classification number: H04H60/04 ,  G06F3/162 ,  G10L21/0208 ,  H04B1/1036

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract translation: 音频输出电路包括片上左声道放大器模块，片上中心声道放大器模块和片上右声道放大器模块。 左通道IC引脚可操作地耦合到片上左声道放大器模块的输出。 右通道IC引脚可操作地耦合到片上右声道放大器模块的输出。 中心通道IC引脚可操作地耦合到片上中心通道放大器模块的输出端。 中心通道反馈IC引脚可操作地耦合到片上中心通道放大器模块的输入端以提供反馈回路。 左插孔连接可操作地耦合到左通道IC引脚。 右插孔连接可操作地耦合到右通道IC引脚。 耦合到中心反馈IC引脚的插座返回连接。 电感器具有耦合到插座返回连接的第一节点和耦合到中心通道IC引脚的第二节点。

公开(公告)号：US07876911B2

公开(公告)日：2011-01-25

申请号：US11389780

申请日：2006-03-27

Applicant: Matthew D. Felder ,  Matthew Brady Henson

Inventor： Matthew D. Felder ,  Matthew Brady Henson

IPC: H04R1/10

CPC classification number: H04R3/04

Abstract: A headphone driver includes a driver module for generating a plurality of headphone driver signals including a filtered stereo sum signal.

Abstract translation: 耳机驱动器包括用于产生包括滤波后的立体声和信号的多个耳机驱动器信号的驱动器模块。

公开(公告)号：US07602862B2

公开(公告)日：2009-10-13

申请号：US11237344

申请日：2005-09-28

Applicant: Michael R. May ,  Matthew D. Felder

Inventor： Michael R. May ,  Matthew D. Felder

IPC: H03D3/00 ,  H03K9/06 ,  H03K9/00

CPC classification number: H03D3/007

Abstract: A mixing module includes a plurality of switched sample modules operably for generating a corresponding plurality of samples of an analog input signal in response to a control signal. A control module generates a mixing sequence and a control signal based on the mixing sequence, the control signal including a sequence of sample positions at a sampling clock rate and a sequence of scale factors, the sequence of scale factors based on an oscillation, wherein the sampling clock has a sample period and wherein the sequence of sample positions repeats at a sample position period greater than a sample interval, the sample interval equal to the sample period times the number of the plurality of switched sample circuits.

Abstract translation: 混合模块包括可操作地用于响应于控制信号产生模拟输入信号的相应多个样本的多个切换采样模块。 控制模块基于混合序列产生混合序列和控制信号，该控制信号包括采样时钟速率的采样位置序列和比例因子序列，基于振荡的比例因子序列，其中， 采样时钟具有采样周期，其中采样位置序列在大于采样间隔的采样位置周期重复，采样间隔等于采样周期乘以多个开关采样电路的数量。