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    Structure For Detecting Clock Gating Opportunities In A Pipelined Electronic Circuit Design
    1.
    发明申请
    Structure For Detecting Clock Gating Opportunities In A Pipelined Electronic Circuit Design 有权
    用于检测流水线电子电路设计中的时钟门控机制的结构

    公开(公告)号：US20090217068A1

    公开(公告)日：2009-08-27

    申请号：US12347968

    申请日：2008-12-31

    申请人： Matthew Earl Fernsler, JR. ,  Hans Mikael Jacobson ,  Johny Srouji ,  Todd Swanson

    发明人： Matthew Earl Fernsler, JR. ,  Hans Mikael Jacobson ,  Johny Srouji ,  Todd Swanson

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3203 ,  G06F1/3237 ,  G06F9/3869 ,  G06F17/505 ,  G06F2217/78 ,  Y02D10/128

    摘要： A design structure for a pipeline electronic processor device may be embodied in a machine readable medium for designing, manufacturing or testing a processor integrated circuit. The design structure may embody a pipeline electronic circuit that enables power conservation in the stages of the pipeline via a simulation that identifies clock-gating opportunities among the stages of the pipeline. In one embodiment, simulation results assist a designer in the design of the pipeline electronic circuit design structure to achieve power conservation by incorporating clock-gating circuitry among the stages of the pipeline at clock gating opportunity locations that the simulation identifies.

    摘要翻译： 用于管道电子处理器设备的设计结构可以体现在用于设计，制造或测试处理器集成电路的机器可读介质中。 该设计结构可以体现管道电子电路，该管道电子电路能够通过模拟来识别流水线阶段之间的时钟选通机会，从而在管线的阶段中实现功率节省。 在一个实施例中，仿真结果帮助设计者设计流水线电子电路设计结构，以通过在模拟识别的时钟选通机会位置处在管线的阶段之间并入时钟选通电路来实现功率节省。

    Structure for detecting clock gating opportunities in a pipelined electronic circuit design
    2.
    发明授权
    Structure for detecting clock gating opportunities in a pipelined electronic circuit design 有权
    用于在流水线电路设计中检测时钟门控机会的结构

    公开(公告)号：US08244515B2

    公开(公告)日：2012-08-14

    申请号：US12347968

    申请日：2008-12-31

    申请人： Matthew Earl Fernsler ,  Hans Mikael Jacobson ,  Johny Srouji ,  Todd Swanson

    发明人： Matthew Earl Fernsler ,  Hans Mikael Jacobson ,  Johny Srouji ,  Todd Swanson

    IPC分类号： G06F17/50

    CPC分类号： G06F1/3203 ,  G06F1/3237 ,  G06F9/3869 ,  G06F17/505 ,  G06F2217/78 ,  Y02D10/128

    摘要： A design structure for a pipeline electronic processor device may be embodied in a machine readable medium for designing, manufacturing or testing a processor integrated circuit. The design structure may embody a pipeline electronic circuit that enables power conservation in the stages of the pipeline via a simulation that identifies clock-gating opportunities among the stages of the pipeline. In one embodiment, simulation results assist a designer in the design of the pipeline electronic circuit design structure to achieve power conservation by incorporating clock-gating circuitry among the stages of the pipeline at clock gating opportunity locations that the simulation identifies.

    摘要翻译： 用于管道电子处理器设备的设计结构可以体现在用于设计，制造或测试处理器集成电路的机器可读介质中。 该设计结构可以体现管道电子电路，该管道电子电路能够通过模拟来识别流水线阶段之间的时钟选通机会，从而在管线的阶段中实现功率节省。 在一个实施例中，仿真结果帮助设计者设计流水线电子电路设计结构，以通过在模拟识别的时钟选通机会位置处在管线的阶段之间并入时钟选通电路来实现功率节省。