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公开(公告)号：US06281813B1
公开(公告)日：2001-08-28
申请号：US09349594
申请日：1999-07-09
IPC分类号： H04N560
CPC分类号： H04N5/607 , H04N5/602 , H04N21/42607 , H04N21/8106
摘要： An integrated circuit for decoding an analog audio signal includes a tuner that receives the analog audio signal and provides a sound intercarrier frequency signal. A digital demodulator receives and digitizes the sound intercarrier frequency signal to provide a digitized sound intercarrier frequency signal, and digitally demodulates the digitized sound intercarrier frequency signal to provide a digitized multichannel television sound (MTS) demodulated signal. A digital broadcast television system committee (BTSC) compatible decoder receives and decodes the digitized multichannel television sound (MTS) demodulated signal, and provides a summed (L+R) audio output signal and a difference (L−R) audio output signal.
摘要翻译： 用于解码模拟音频信号的集成电路包括接收模拟音频信号并提供声音载波间频率信号的调谐器。 数字解调器接收和数字化声音载波间频率信号，以提供数字化的声音载波间频率信号，并且数字解调数字化的载波间频率信号以提供数字化的多声道电视声音（MTS）解调信号。 数字广播电视系统委员会（BTSC）兼容解码器接收并解码数字化的多声道电视声音（MTS）解调信号，并提供加和（L + R）音频输出信号和差分（L-R）音频输出信号。
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2.发明授权Method and circuit for decoding an analog audio signal using the BTSC standard 有权使用BTSC标准解码模拟音频信号的方法和电路公开(公告)号：US06492913B2
公开(公告)日：2002-12-10
申请号：US09932473
申请日：2001-08-17
IPC分类号： H03M700
CPC分类号： H04N5/607 , H04N5/602 , H04N21/42607 , H04N21/8106
摘要： An integrated circuit for decoding an analog audio signal includes a tuner that receives the analog audio signal and provides a sound intercarrier frequency signal. A digital demodulator receives and digitizes the sound intercarrier frequency signal to provide a digitized sound intercarrier frequency signal, and digitally demodulates the digitized sound intercarrier frequency signal to provide a digitized multichannel television sound (MTS) demodulated signal. A digital broadcast television system committee (BTSC) compatible decoder receives and decodes the digitized multichannel television sound (MTS) demodulated signal, and provides a summed (L+R) audio output signal and a difference (L−R) audio output signal.
摘要翻译： 用于解码模拟音频信号的集成电路包括接收模拟音频信号并提供声音载波间频率信号的调谐器。 数字解调器接收和数字化声音载波间频率信号，以提供数字化的声音载波间频率信号，并且数字解调数字化的载波间频率信号以提供数字化的多声道电视声音（MTS）解调信号。 数字广播电视系统委员会（BTSC）兼容解码器接收并解码数字化的多声道电视声音（MTS）解调信号，并提供加和（L + R）音频输出信号和差分（L-R）音频输出信号。
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公开(公告)号：US07292655B2
公开(公告)日：2007-11-06
申请号：US11441943
申请日：2006-05-26
CPC分类号： H04L25/491 , H04L25/06
摘要： A technique of decoding a biphase signal comprises sampling the biphase signal to obtain phase sample values and sampling the biphase signal to obtain magnitude sample values. A first digital signal is derived from the phase sample values and associated bit combinations are formed from the first digital signal. A decision is made whether the bit combination is an erroneous bit combination, and a probability check is performed to obtain probability values that decide which parts of the erroneous bit combination are true and which are false. A corrected bit combination is generated from the obtained probability values, and a second digital signal is generated whose data states are formed from the valid bit combination and, in the presence of an erroneous bit combination, from the corrected bit combination.
摘要翻译： 解码双相信号的技术包括对双相信号进行采样以获得相位采样值并对双相信号进行采样以获得幅度采样值。 从相位采样值导出第一数字信号，并且从第一数字信号形成关联位组合。 确定比特组合是否是错误比特组合，并且执行概率检查以获得决定错误比特组合的哪些部分为真并且是假的概率值。 从所获得的概率值产生校正的比特组合，并且生成其数据状态由有效比特组合形成并且在存在错误比特组合的情况下来自校正比特组合的第二数字信号。
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公开(公告)号：US20060215791A1
公开(公告)日：2006-09-28
申请号：US11441943
申请日：2006-05-26
IPC分类号： H04L27/22
CPC分类号： H04L25/491 , H04L25/06
摘要： A technique of decoding a biphase signal comprises sampling the biphase signal to obtain phase sample values and sampling the biphase signal to obtain magnitude sample values. A first digital signal is derived from the phase sample values and associated bit combinations are formed from the first digital signal. A decision is made whether the bit combination is an erroneous bit combination, and a probability check is performed to obtain probability values that decide which parts of the erroneous bit combination are true and which are false. A corrected bit combination is generated from the obtained probability values, and a second digital signal is generated whose data states are formed from the valid bit combination and, in the presence of an erroneous bit combination, from the corrected bit combination.
摘要翻译： 解码双相信号的技术包括对双相信号进行采样以获得相位采样值并对双相信号进行采样以获得幅度采样值。 从相位采样值导出第一数字信号，并且从第一数字信号形成关联位组合。 确定比特组合是否是错误比特组合，并且执行概率检查以获得决定错误比特组合的哪些部分为真并且是假的概率值。 从所获得的概率值产生校正的比特组合，并且生成其数据状态由有效比特组合形成并且在存在错误比特组合的情况下来自校正比特组合的第二数字信号。
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公开(公告)号：US07095807B2
公开(公告)日：2006-08-22
申请号：US10178774
申请日：2002-06-24
CPC分类号： H04L25/4904 , H04H40/18 , H04H2201/13
摘要： A technique of decoding erroneous biphase signals is disclosed comprising the following steps. First, phase and magnitude sample values (ps, bs) are formed, from which a first digital signal (d1) is derived. From this, associated bit combinations (St1, St2; Stp) are determined, and a decision is made as to whether the respective bit combination (St1, St2; Stp) is a valid combination (Sg1, Sg2; Sgp) or an erroneous one (Sf1, Sf2; Sfp). Probability values (Sw1, Sw2; Swp) are determined that decide which parts of the erroneous bit combination (Sf1, Sf2; Sfp) are probably true and/or which are probably false. Next, a corrected bit combination (Sk1, Sk2; Skp) is formed from the existing information. Finally, a second digital signal (d2) is generated as an output signal, whose data states are formed either from the valid bit combination (Sg1, Sg2; Sgp) or from the corrected bit combination (Sk1, Sk2; Skp).
摘要翻译： 公开了一种解码错误双相信号的技术，包括以下步骤。 首先，形成相位和幅度采样值（ps，bs），从中得到第一数字信号（d 1）。 由此，确定相关联的组合（St 1，St 2; Stp），并且确定各个位组合（St 1，St 2; Stp）是否是有效组合（Sg 1，Sg 2; Sgp）或错误的（Sf 1，Sf 2; Sfp）。 确定概率值（Sw 1，Sw 2; Swp），其确定错误位组合（Sf 1，Sf 2; Sfp）的哪些部分可能是真的和/或哪些可能是假的。 接下来，根据现有信息形成校正的位组合（Sk 1，Sk 2; Skp）。 最后，生成第二数字信号（d 2）作为输出信号，其数据状态由有效位组合（Sg 1，Sg 2; Sgp）或从校正位组合（Sk 1，Sk 2; Skp）。
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公开(公告)号：US07397873B2
公开(公告)日：2008-07-08
申请号：US11398431
申请日：2006-04-05
IPC分类号： H04L27/08
摘要： A system for decoding an electrical input signal includes a filter that impresses a variable gain on a portion of the input signal to deemphasize a spectral region of the input signal. The variable gain is set as a function of a variable gain control signal. A frequency detector generates the variable gain control signal in accordance with a frequency value wherein approximately one-half of the energy of the input signal is below the frequency value.
摘要翻译： 用于解码电输入信号的系统包括滤波器，其对输入信号的一部分施加可变增益以去加强输入信号的频谱区域。 可变增益被设置为可变增益控制信号的函数。 频率检测器根据频率值产生可变增益控制信号，其中输入信号的能量的大约一半低于频率值。
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公开(公告)号：US20060181640A1
公开(公告)日：2006-08-17
申请号：US11398431
申请日：2006-04-05
IPC分类号： H04N11/02
摘要： A system for decoding an electrical input signal includes a filter that impresses a variable gain on a portion of the input signal to deemphasize a spectral region of the input signal. The variable gain is set as a function of a variable gain control signal. A frequency detector generates the variable gain control signal in accordance with a frequency value wherein approximately one-half of the energy of the input signal is below the frequency value.
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公开(公告)号：US20100235589A1
公开(公告)日：2010-09-16
申请号：US12749011
申请日：2010-03-29
IPC分类号： G06F12/00
CPC分类号： G06F13/1663 , G06F9/321 , G06F9/3824 , G06F9/526
摘要： Access to a memory area by a first processor that executes a first processor program and a second processor that executes a second processor program is granted to one of the first processor and the second processor at a time. Access to the memory area by the first processor and the second processor are cyclically uniquely allocated (e.g., t≡[(ad mod m)=o]) between the first and the second processor by the first and second processor programs.
摘要翻译： 一次一个地向第一处理器和第二处理器中的一个授予执行第一处理器程序的第一处理器和执行第二处理器程序的第二处理器对存储器区域的访问。 由第一处理器和第二处理器对第一处理器和第二处理器之间的存储区进行循环唯一地分配（例如，t≡[（ad mod m）= o]）。
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公开(公告)号：US07689779B2
公开(公告)日：2010-03-30
申请号：US11503673
申请日：2006-08-14
IPC分类号： G06F12/00
CPC分类号： G06F13/1663 , G06F9/321 , G06F9/3824 , G06F9/526
摘要： Access to a memory area by a first processor that executes a first processor program and a second processor that executes a second processor program is granted to one of the first processor and the second processor at a time. Access to the memory area by the first processor and the second processor are cyclically uniquely allocated (e.g., t≡[(ad mod m)=o]) between the first and the second processor by the first and second processor programs.
摘要翻译： 一次一个地向第一处理器和第二处理器中的一个授予执行第一处理器程序的第一处理器和执行第二处理器程序的第二处理器对存储器区域的访问。 由第一处理器和第二处理器对第一处理器和第二处理器之间的存储区进行循环唯一地分配（例如，t≡[（ad mod m）= o]）。
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公开(公告)号：US07046750B1
公开(公告)日：2006-05-16
申请号：US09897722
申请日：2001-07-02
IPC分类号： H04L27/08
摘要： A system for decoding an electrical input signal includes a filter that impresses a variable gain on the portion of input signal to deemphasize a spectral region of the input signal. The variable gain is set as a function of a variable gain control signal. A frequency detector generates the variable gain control signal in accordance with a frequency value wherein approximately one-half of the energy of the input signal is below the frequency value.
摘要翻译： 用于解码电输入信号的系统包括滤波器，其对输入信号的一部分施加可变增益以去加强输入信号的频谱区域。 可变增益被设置为可变增益控制信号的函数。 频率检测器根据频率值产生可变增益控制信号，其中输入信号的能量的大约一半低于频率值。
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