公开(公告)号：US09653186B2

公开(公告)日：2017-05-16

申请号：US14600496

申请日：2015-01-20

Applicant: MediaTek Inc.

Inventor： Chin-Jung Su ,  Rei-Fu Huang

IPC: G11C29/00 ,  G11C29/56 ,  G11C29/12

CPC classification number: G11C29/56012 ,  G11C29/12015

Abstract: A memory-testing device for testing a memory is provided. The memory-testing device includes a testing circuitry and a register. The testing circuitry is coupled to the memory for testing performance of the memory. The register is coupled to the testing circuitry and inputted by a testing clock signal, wherein the testing clock signal is different from an original clock signal of the memory and/or the testing circuitry. The testing clock signal is utilized for adjusting the time when the memory-testing device latches data from the memory to decrease a timing slack of the memory-testing device.